®
PCM
63P
PCM63P
DEMO BOARD
AVAILABLE
See Appendix A
Colinear
™
20-Bit Monolithic Audio
DIGITAL-TO-ANALOG CONVERTER
FEATURES
q
q
q
q
q
q
q
q
q
DESCRIPTION
The PCM63P is a precision 20-bit digital-to-analog
converter with ultra-low distortion (–96dB max with a
full scale output; PCM63P-K). Incorporated into the
PCM63P is a unique
Colinear
dual-DAC per channel
architecture that eliminates unwanted glitches and
other nonlinearities around bipolar zero. The PCM63P
also features a very low noise (116dB max SNR;
A-weighted method) and fast settling current output
(200ns typ, 2mA step) which is capable of 16-times
oversampling rates.
Applications include very low distortion frequency
synthesis and high-end consumer and professional
digital audio applications.
Upper
B2 Adj
23
Lower
B2 Adj
24
PCM63P
Colinear
20-Bit DAC
Upper DAC
Positive
Data Latches
19-Bit
Upper
DAC
COLINEAR
20-BIT AUDIO DAC
NEAR-IDEAL LOW LEVEL OPERATION
GLITCH-FREE OUTPUT
ULTRA LOW –96dB max THD+N
(Without External Adjustment)
116dB SNR min (A-Weight Method)
INDUSTRY STD SERIAL INPUT FORMAT
FAST (200ns) CURRENT OUTPUT
(
±
2mA;
±
2% max)
CAPABLE OF 16x OVERSAMPLING
COMPLETE WITH REFERENCE
+5V
Analog
2
+5V
Digital
13
–5V
Analog
28
–5V
Digital
11
Clock
18
Input Shift
Register
and
Control
Logic
9
R
FEEDBACK
Latch Enable
20
10
Lower DAC
Negative
Data Latches
19-Bit
Lower
DAC
R
FEEDBACK
Data
21
6
I
OUT
Buried
Zener
Reference
Servo
Amp
Ref
Amp
5
4
Bipolar Offset Current
Offset Decouple
3
Reference
Decouple
1
Servo
Decouple
25
Potentiometer
Voltage
7
Analog
Common
12
Digital
Common
Colinear
™, Burr-Brown Corp.
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
®
© 1990 Burr-Brown Corporation
PDS-1083F
1
Printed in U.S.A. January, 1998
PCM63P
SPECIFICATIONS
ELECTRICAL
All specifications at 25°C and
±V
A
and
±V
D
=
±5V,
unless otherwise noted.
PCM63P, PCM63P-J, PCM63P-K
PARAMETER
RESOLUTION
DYNAMIC RANGE,
ΤΗD+Ν
at –60dB Referred to Full Scale
PCM63P
PCM63P-J
PCM63P-K
DIGITAL INPUT
Logic Family
Logic Level: V
IH
V
IL
I
IH
I
IL
Data Format
Input Clock Frequency
CONDITIONS
MIN
20
TYP
MAX
UNITS
Bits
96
100
104
100
104
108
dB
dB
dB
TTL/CMOS Compatible
+2.4
0
V
IH
= +2.7V
V
IL
= +0.4V
Serial, MSB First, BTC
(1)
12.5
+V
D
0.8
+1
–50
25
V
V
µA
µA
MHz
TOTAL HARMONIC DISTORTION + N
(2)
, Without Adjustments
PCM63P
f
S
= 352.8kHz
(4)
f = 991Hz (0dB)
(3)
f = 991Hz (–20dB)
f
S
= 352.8kHz
f = 991Hz (–60dB)
f
S
= 352.8kHz
PCM63P-J
f = 991Hz (0dB)
f
S
= 352.8kHz
f = 991Hz (–20dB)
f
S
= 352.8kHz
f = 991Hz (–60dB)
f
S
= 352.8kHz
PCM63P-K
f = 991Hz (0dB)
f
S
= 352.8kHz
f = 991Hz (–20dB)
f
S
= 352.8kHz
f = 991Hz (–60dB)
f
S
= 352.8kHz
ACCURACY
Level Linearity
Gain Error
Bipolar Zero Error
(5)
Gain Drift
Bipolar Zero Drift
Warm-up Time
IDLE CHANNEL SNR
(6)
POWER SUPPLY REJECTION
ANALOG OUTPUT
Output Range
Output Impedance
Internal R
FEEDBACK
Settling Time
Glitch Energy
POWER SUPPLY REQUIREMENTS
±V
A
,
±V
D
Supply Voltage Range
+I
A
, +I
D
Combined Supply Current
–I
A
, –I
D
Combined Supply Current
Power Dissipation
TEMPERATURE RANGE
Specification
Operating
Storage
at –90dB Signal Level
–92
–80
–40
–96
–82
–44
–100
–88
–48
±0.3
±1
±12
25
4
1
–88
–74
–36
–92
–76
–40
–96
–82
–44
±1
±2
dB
dB
dB
dB
dB
dB
dB
dB
dB
0°C to 70°C
0°C to 70°C
20Hz to 20kHz at BPZ
(7)
dB
%
µA
ppm/°C
ppm of FSR/°C
Minute
dB
dB
+116
+120
+86
±2.00
670
1.5
200
No Glitch Around Zero
2mA Step
mA
Ω
kΩ
ns
±4.50
+V
A
, +V
D
= +5V
–V
A
, –V
D
= –5V
±V
A
,
±V
D
=
±5V
0
–40
–60
±5
10
–35
225
±5.50
15
–45
300
V
mA
mA
mW
°C
°C
°C
+70
+85
+100
NOTES: (1) Binary Two’s Complement coding. (2) Ratio of (Distortion
RMS
+ Noise
RMS
) / Signal
RMS
. (3) D/A converter output frequency (signal level). (4) D/A
converter sample frequency (8 x 44.1kHz; 8x oversampling). (5) Offset error at bipolar zero. (6) Measured using an OPA27 and 1.5kΩ feedback and an A-weighted
filter. (7) Bipolar Zero.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
PCM63P
2
PIN ASSIGNMENTS
PIN
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
DESCRIPTION
Servo Amp Decoupling Capacitor
+5V Analog Supply Voltage
Reference Decoupling Capacitor
Offset Decoupling Capacitor
Bipolar Offset Current Output (+2mA)
DAC Current Output (0 to –4mA)
Analog Common Connection
No Connection
Feedback Resistor Connection (1.5kΩ)
Feedback Resistor Connection (1.5kΩ)
–5V Digital Supply Voltage
Digital Common Connection
+5V Digital Voltage Supply
No Connection
No Connection
No Connection
No Connection
DAC Data Clock Input
No Connection
DAC Data Latch Enable
DAC Data Input
No Connection
Optional Upper DAC Bit-2 Adjust (–4.29V)*
Optional Lower DAC Bit-2 Adjust (–4.29V)*
Bit Adjust Reference Voltage Tap (–3.52V)*
No Connection
No Connection
–5V Analog Supply Voltage
MNEMONIC
CAP
+V
A
CAP
CAP
BPO
I
OUT
ACOM
NC
RF
1
RF
2
–V
D
DCOM
+V
D
NC
NC
NC
NC
CLK
NC
LE
DATA
NC
UB2 Adj
LB2 Adj
V
POT
NC
NC
–V
A
ABSOLUTE MAXIMUM RATINGS
+V
A
, +V
D
to ACOM/DCOM ........................................................ 0V to +8V
–V
A
, –V
D
to ACOM/DCOM ........................................................ 0V to –8V
–V
A
, –V
D
to +V
A
, +V
D
............................................................. 0V to +16V
ACOM to DCOM ...............................................................................
±0.5V
Digital Inputs (pins 18, 20, 21) to DCOM ............................... –1V to +V
D
Power Dissipation .......................................................................... 500mW
Lead Temperature, (soldering, 10s) .............................................. +300°C
Max Junction Temperature .............................................................. 165°C
Thermal Resistance,
θ
JA
............................................................... 70°C/W
NOTE: Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute
maximum conditions for extended periods may affect device reliability.
PACKAGE INFORMATION
PRODUCT
PCM63P
PCM63P-J
PCM63P-K
PACKAGE
28-Pin Plastic DIP
28-Pin Plastic DIP
28-Pin Plastic DIP
PACKAGE DRAWING
NUMBER
(1)
215
215
215
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
*Nominal voltages at these nodes assuming
±V
A
;
±V
D
=
±5V.
ORDERING INFORMATION
PRODUCT
PCM63P
PCM63P-J
PCM63P-K
PACKAGE
28-Pin Plastic DIP
28-Pin Plastic DIP
28-Pin Plastic DIP
TEMPERATURE
RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
MAX THD+N,
AT 0dB
–88dB
–92dB
–96dB
®
3
PCM63P
THEORY OF OPERATION
DUAL-DAC
COLINEAR
ARCHITECTURE
Digital audio systems have traditionally used laser-trimmed,
current-source DACs in order to achieve sufficient accuracy.
However even the best of these suffer from potential low-
level nonlinearity due to errors at the major carry bipolar
zero transition. More recently, DACs employing a different
architecture which utilizes noise shaping techniques and
very high oversampling frequencies, have been introduced
(“Bitstream”, “MASH”, or 1-bit DACs). These DACs over-
come the low level linearity problem, but only at the expense
of signal-to-noise performance, and often to the detriment of
channel separation and intermodulation distortion if the
succeeding circuitry is not carefully designed.
The PCM63 is a new solution to the problem. It combines all
the advantages of a conventional DAC (excellent full scale
performance, high signal-to-noise ratio and ease of use) with
superior low-level performance. Two DACs are combined
in a complementary arrangement to produce an extremely
linear output. The two DACs share a common reference and
a common R-2R ladder to ensure perfect tracking under all
conditions. By interleaving the individual bits of each DAC
and employing precise laser trimming of resistors, the highly
accurate match required between DACs is achieved.
This new, complementary linear or dual-DAC
Colinear
approach, which steps away from zero with small steps in
both directions, avoids any glitching or “large” linearity
errors and provides an absolute current output. The low level
performance of the PCM63P is such that real 20-bit resolu-
tion can be realized, especially around the critical bipolar
zero point.
Table I shows the conversion made by the internal logic of
the PCM63P from binary two’s complement (BTC). Also,
the resulting internal codes to the upper and lower DACs
(see front page block diagram) are listed. Notice that only
the LSB portions of either internal DAC are changing
around bipolar zero. This accounts for the superlative per-
formance of the PCM63P in this area of operation.
DISCUSSION OF SPECIFICATIONS
DYNAMIC SPECIFICATIONS
Total Harmonic Distortion + Noise
The key specification for the PCM63P is total harmonic
distortion plus noise (THD+N). Digital data words are read
into the PCM63P at eight times the standard compact disk
audio sampling frequency of 44.1kHz (352.8kHz) so that a
sine wave output of 991Hz is realized. For production
testing, the output of the DAC goes to an I to V converter,
then to a programmable gain amplifier to provide gain at
lower signal output test levels, and then through a 40kHz
low pass filter before being fed into an analog type distortion
analyzer. Figure 1 shows a block diagram of the production
THD+N test setup.
For the audio bandwidth, THD+N of the PCM63P is essen-
tially flat for all frequencies. The typical performance curve,
“THD+N vs Frequency,” shows four different output signal
levels: 0dB, –20dB, –40dB, and –60dB. The test signals are
derived from a special compact test disk (the CBS CD-1). It
is interesting to note that the –20dB signal falls only about
10dB below the full scale signal instead of the expected
20dB. This is primarily due to the superior low-level signal
performance of the dual-DAC
Colinear
architecture of the
PCM63P.
In terms of signal measurement, THD+N is the ratio of
Distortion
RMS
+ Noise
RMS
/ Signal
RMS
expressed in dB. For
the PCM63P, THD+N is 100% tested at all three specified
output levels using the test setup shown in Figure 1. It is
significant to note that this test setup does not include any
output deglitching circuitry. All specifications are achieved
without the use of external deglitchers.
Dynamic Range
Dynamic range in audio converters is specified as the measure
of THD+N at an effective output signal level of –60dB
referred to 0dB. Resolution is commonly used as a theoretical
measure of dynamic range, but it does not take into account
the effects of distortion and noise at low signal levels. The
ANALOG OUTPUT
+Full Scale
+Full Scale – 1LSB
Bipolar Zero + 2LSB
Bipolar Zero + 1LSB
Bipolar Zero
Bipolar Zero – 1LSB
Bipolar Zero – 2LSB
–Full Scale + 1LSB
–Full Scale
INPUT CODE
(20-bit Binary Two’s Complement)
011...111
011...110
000...010
000...001
000...000
111...111
111...110
100...001
100...000
LOWER DAC CODE
(19-bit Straight Binary)
111...111 + 1LSB*
111...111 + 1LSB*
111...111 + 1LSB*
111...111 + 1LSB*
111...111 + 1LSB*
111...111
111...110
000...001
000...000
UPPER DAC CODE
(19-bit Straight Binary)
111...111
111...110
000...010
000...001
000...000
000...000
000...000
000...000
000...000
*The extra weight of 1LSB is added at this point to make the transfer function symmetrical around bipolar zero.
TABLE I. Binary Two’s Complement to
Colinear
Conversion Chart.
®
5
PCM63P
Microcontroller MCU
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