Philips Semiconductors
Product specification
(67 + 1)
×
102 pixels matrix LCD driver
CONTENTS
1
2
3
4
5
6
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
8
8.1
8.2
9
9.1
9.1.1
9.1.2
9.2
9.2.1
9.2.2
10
10.1
10.1.1
10.1.2
10.1.3
10.1.4
10.2
10.3
11
11.1
11.2
11.3
11.4
11.5
11.6
FEATURES
APPLICATIONS
GENERAL DESCRIPTION
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
I/O buffer and interface
Oscillator
Address counter
Display data RAM
Timing generator
Display address counter
LCD row and column drivers
LCD waveforms and DDRAM to data mapping
DDRAM addressing
Data order
Mirror X
Mirror Y
Bottom row swap
Output row order
PARALLEL INTERFACES
6800-type parallel interface
8080-type parallel interface
SERIAL INTERFACES
Serial peripheral interface
Write mode
Read mode
Serial interface (3-line)
Write mode
Read mode
I
2
C-BUS
INTERFACE (Hs-MODE)
Characteristics of the I
2
C-bus (Hs-mode)
System configuration
Bit transfer
Start and stop conditions
Acknowledge
I
2
C-bus Hs-mode protocol
Command decoder
INSTRUCTIONS
Initialization
Reset function
Power-down mode
Display Control
Set Y address of RAM
Set X address of RAM
2
11.7
11.8
11.9
11.10
11.11
11.12
12
13
14
15
16
17
17.1
17.2
17.3
17.4
17.4.1
17.4.2
17.5
17.5.1
17.5.2
17.5.3
17.6
17.7
17.8
17.9
18
18.1
18.2
18.3
19
20
21
22
23
24
25
PCF8813
Set maximum X address or Y address
Set display start line, initial start row and row 0
Set normal or partial display mode
Free programmable multiplex rate
Set HV generator stages
Bias system
TEMPERATURE COMPENSATION
LIMITING VALUES
HANDLING
DC CHARACTERISTICS
AC CHARACTERISTICS
MODULE MAKER PROGRAMMING
LCD voltage calibration
Manufacturer identity
Seal bit
One time programming
Architecture
Operations
Interface commands
Disable OTP command
Module maker calibration
Refresh
Filling the shift register
Programming flow
Programming specification
Programming examples
APPLICATION INFORMATION
Protection from light
Application examples
Chip-on-glass applications
DEVICE PROTECTION DIAGRAM
BONDING PAD INFORMATION
TRAY INFORMATION
DATA SHEET STATUS
DEFINITIONS
DISCLAIMERS
PURCHASE OF PHILIPS I
2
C COMPONENTS
2004 Mar 05
Philips Semiconductors
Product specification
(67 + 1)
×
102 pixels matrix LCD driver
1
FEATURES
PCF8813
•
Single-chip LCD controller or driver
•
67 row + 1 icon row, 102 column outputs (the icon row is
available twice to allow icons to be displayed at the top
or at the bottom of the display)
•
Very low power consumption, optimized for
battery operated systems
•
On-chip:
– Display data RAM 68
×
102 bits
– Configurable voltage multiplier (× 5,
×
4,
×
3 and
×
2)
generating highly accurate V
LCD
and includes
booster capacitors (external V
LCD
is also possible)
– Temperature compensation of V
LCD
with four
selectable temperature coefficients
– Generation of intermediate LCD bias voltages
– Highly-accurate built-in oscillator requiring no
external components (an external clock is also
possible)
•
High integration level resulting in minimum number of
external capacitors and resistors
•
Selectable 8-bit parallel interface, 3-line or 4-line Serial
Peripheral Interface (SPI), 3-line serial interface and
high-speed I
2
C-bus interface
•
External reset input
•
CMOS compatible inputs
•
Mux rates: 1 : 9 to 1 : 65 in steps of 8 and 1 : 68
•
Logic supply voltage range 1.7 to 3.3 V
•
High voltage generator supply voltage range
2.4 to 4.5 V
•
Display supply voltage range 3.0 to 9.0 V
•
One Time Programmable (OTP) V
LCD
trimming
•
Horizontal and vertical mirroring
•
Status read which allows chip recognition and content
checking of some registers
4
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
PCF8813U/2DA/2
−
DESCRIPTION
chip with bumps in tray for COG
VERSION
−
•
Start address line which allows, for instance, scrolling of
the displayed image
•
Programmable display RAM pointers for various display
sizes
•
Slim chip layout optimized for chip-on-glass applications
•
Operating temperature range
−40
to +85
°C
•
Very close tolerance on V
LCD
and frame frequency for
excellent optical performance
•
Support for LCD cell tolerance compensation of V
LCD
by
OTP storage.
2
APPLICATIONS
•
Telecom equipment
•
Portable instruments
•
Point of sale terminals.
3
GENERAL DESCRIPTION
The PCF8813 is a low power CMOS LCD controller driver
designed to drive a graphic display of 67 rows and
102 columns plus an icon row of up to 102 symbols. All
necessary functions for the display are provided in a single
chip, including on-chip generation of the LCD supply and
bias voltages, resulting in a minimum of external
components and low power consumption. The PCF8813
can interface to microcontrollers via a parallel, serial or
I
2
C-bus interface.
2004 Mar 05
3
Philips Semiconductors
Product specification
(67 + 1)
×
102 pixels matrix LCD driver
6
PINNING
SYMBOL
R15 to R0
R16 to R31
C0 to C101
R67
R66 to R48
R32 to R47
R67
SDAHOUT
SDAH
V
DD1
V
DD3
V
DD2
V
DD1
R/W/WR
E/RD
DB0
DB1
DB2/SA0
DB3/SA1
DB4
DB5/SDOUT
DB6/SCLK
DB7/SDATA
V
SS1
D/C
SCE/SCLH
V
OTPPROG
V
DD1
OSC
V
SS2
V
SS1
T5
T1
T2
PS0
PS1
PS2
V
DD1
T4
T3
2004 Mar 05
PAD
(1)
7 to 22
23 to 38
39 to 140
141
142 to 160
161 to 176
177
183
184 to 185
186 to 191
192 to 196
197 to 206
207
208
209
210
211
212
213
214
215
216
217
218
219
220 to 221
222 to 224
225
226
227 to 236
237 to 246
247
248
249
250
251
252
253
254
255
duplicated LCD row driver output for row 67 (used only for icons)
data output for I
2
C-bus interface; notes 2 and 3
data output for I
2
C-bus interface; note 2
supply voltage 1; note 4
supply voltage 3; note 4
supply voltage 2; note 4
supply voltage 1; notes 4 and 5
READ/WRITE (6800) or WRITE (8080 interface) input; note 6
LCD column driver outputs
LCD row driver output for row 67 (used only for icons)
LCD row driver outputs
LCD row driver outputs
DESCRIPTION
PCF8813
clock enable (6800 interface) or READ (8080 interface) input; note 7
parallel data input/output; note 8
parallel data input/output; note 8
parallel data input/output or I
2
C-bus slave address input (bit 0)
parallel data input/output or I
2
C-bus slave address input (bit 1)
parallel data input/output; note 8
parallel data input/output or serial output (SDOUT)
parallel data input/output or output or serial clock input (SCLK)
parallel data input/output or serial data input (SDATA)
ground voltage 1; notes 5 and 9
data/command; note 10
chip enable or clock input for I
2
C-bus interface
voltage inputs for OTP programming; see note 11
supply voltage 1; notes 4 and 5
oscillator input; note 12
ground voltage 2; note 9
ground voltage 1; note 9
test input 5; note 13
test input 1; note 13
test input 2; note 13
parallel/serial/I
2
C-bus data input selection pad 0
parallel/serial/I
2
C-bus data input selection pad 1
parallel/serial/I
2
C-bus data input selection pad 2
supply voltage 1; notes 4 and 5
test output 4; note 13
test output 3; note 13
5
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