Philips Semiconductors
Product specification
Microcontroller with extended I/O
CONTENTS
1
2
3
4
5
5.1
5.2
6
7
8
9
10
11
12
13
13.1
14
15
15.1
15.2
15.2.1
15.2.2
15.3
15.3.1
15.3.2
15.3.3
16
17
18
FEATURES
GENERAL DESCRIPTION
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING INFORMATION
Pinning
Pin description
PARALLEL PORTS
INSTRUCTION SET
SUMMARY OF DERIVATIVE PORTS AND
REGISTERS
ROM MASK OPTIONS
HANDLING
LIMITING VALUES
DC CHARACTERISTICS
AC CHARACTERISTICS
I
2
C-bus interface characteristics
PACKAGE OUTLINES
SOLDERING
Introduction
DIP
Soldering by dipping or by wave
Repairing soldered joints
SO and VSO
Reflow soldering
Wave soldering
Repairing soldered joints
DEFINITIONS
LIFE SUPPORT APPLICATIONS
PURCHASE OF PHILIPS I
2
C COMPONENTS
PCF84C85A
1996 Nov 21
2
Philips Semiconductors
Product specification
Microcontroller with extended I/O
1
FEATURES
2
GENERAL DESCRIPTION
PCF84C85A
•
8-bit CPU, ROM, RAM, I/O in a single 40-lead package
•
8 kbytes ROM
•
256 bytes RAM
•
I
2
C-bus interface with multi-master capability
•
Over 100 instructions (based on MAB8048)
all of 1 or 2 cycles
•
32 quasi-bidirectional I/O port lines
•
8-bit programmable timer/event counter 1
•
Three single-level vectored interrupts:
– external
– 8-bit programmable timer/event counter 1
– I
2
C-bus
•
Two test inputs, one of which also serves as the external
interrupt input
•
Stop and Idle modes
•
Logic supply voltage: V
DD
= 2.5 to 5.5 V
•
Clock frequency: 1 to 16 MHz
•
Operating temperature:
−40
to +85
°C
•
Manufactured in silicon gate CMOS process.
3
ORDERING INFORMATION
(see note 1)
TYPE
NUMBER
PCF84C85AP
PCF84C85AT
Note
This data sheet details the specific properties of the
PCF84C85A. The shared properties of the PCF84CxxxA
family of microcontrollers are described in the
“PCD84xxxA family”
data sheet which should be read in
conjunction with this publication.
The PCF84C85A is a general purpose CMOS
microcontroller with emphasis on input/output. It provides
32 I/O port lines, 8 kbytes of program memory and
256 bytes of RAM. In addition to the 32 I/O port lines, the
microcontroller provides an on-chip I
2
C-bus interface. This
two-line serial bus extends the microcontroller's
capabilities when implemented with the powerful I
2
C-bus
peripherals.These include LCD drivers, telecom circuits,
AD/DA converters, clock/calendar circuits, EEPROM and
RAM and are listed in
“Data Handbook IC12, I
2
C
Peripherals”.
The instruction set is based on that of the MAB8048 and is
a sub-set of that listed in the
“PCF84CXXXA family”
data
sheet.
PACKAGE
NAME
DIP40
VSO40
DESCRIPTION
plastic dual in-line package; 40 leads (600 mil)
plastic very small outline package; 40 leads
VERSION
SOT 129-1
SOT 158-1
1. Please refer to the Order Entry Form (OEF) for this device for the full type number to use when ordering. This type
number will also specify the required program and the ROM mask options.
1996 Nov 21
3
Philips Semiconductors
Product specification
Microcontroller with extended I/O
5
5.1
PINNING INFORMATION
Pinning
5.2
Pin description
PCF84C85A
Table 1
DIP40 and VSO40 packages.
PIN
1
2 to 9
TYPE
I
I/O
DESCRIPTION
Interrupt/Test 0
8 bits of Port 0: 8-bit
quasi-bidirectional
I/O port
8 bits of Port 1: 8-bit
quasi-bidirectional
I/O port
XTAL input: crystal
oscillator/external
clock input
XTAL output: crystal
oscillator output
ground
Reset input
Derivative Port 0:
quasi-bidirectional
I/O port (8-bit)
Derivative Port 1:
quasi-bidirectional
I/O lines (7-bit)
bidirectional data line
of the I
2
C-bus
interface; or Port 2
quasi-bidirectional
I/O port (1 bit only)
bidirectional clock
line of the I
2
C-bus
interface
Test 1: count input of
8-bit timer/event
counter 1
positive supply
SYMBOL
INT/T0
handbook, halfpage
INT / T0
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
XTAL1
XTAL2
V SS
1
2
3
4
5
6
7
8
9
10
PCF84C85A
11
12
13
14
15
16
17
18
19
20
MLA597
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
V DD
T1
SCLK
SDA / P2.3
DP1.6
P0.0 to P0.7
P1.0 to P1.7
10 to 17
I/O
XTAL1
DP1.5
DP1.4
DP1.3
DP1.2
DP1.1
DP1.0
DP0.7
DP0.6
DP0.5
DP0.4
DP0.3
DP0.2
DP0.1
DP0.0
RESET
18
I
XTAL2
V
SS
RESET
DP0.0 to
DP0.7
DP1.0 to
DP1.6
SDA/P2.3
19
20
21
22 to 29
O
P
I
I/O
30 to 36
I/O
37
I/O
SCLK
38
I/O
T1
Fig.2 Pin configuration.
V
DD
6
PARALLEL PORTS
7
39
I
40
P
INSTRUCTION SET
Of the standard quasi-bidirectional I/O ports, Port 2 is
incomplete, providing only line SDA/P2.3 that is shared
with the I
2
C-bus interface. In addition to the standard ports,
two derivative I/O ports are available:
•
Derivative Port of 8 lines (DP0.0 to DP0.7)
•
Derivative Port of 7 lines (DP1.0 to DP1.6).
Missing bits of incomplete ports, i.e. P2.0 to P2.2 and
DP1.7, are fixed at zero in the corresponding registers.
See
“PCF84CXXXA family”
data sheet for a complete
description of the instruction set.
1996 Nov 21
5
Recruitment
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