Philips Semiconductors
Preliminary specification
Microcontroller for monitor OSD
and auto-sync applications
CONTENTS
1
1.1
1.2
1.3
2
3
4
5
5.1
5.2
6
6.1
6.2
7
7.1
7.2
7.3
8
8.1
9
9.1
9.2
9.3
10
10.1
10.2
10.3
10.4
11
11.1
11.2
11.3
FEATURES
General
Special
OSD
GENERAL DESCRIPTION
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING INFORMATION
Pinning
Pin description
RESET
Reset trip level
Reset status
ANALOG (DC) CONTROL
6 and 7-bit PWM outputs
14-bit PWM output
A typical PWM output application
ANALOG-TO-DIGITAL CONVERTER (ADC)
Conversion algorithm
ON SCREEN DISPLAY (OSD)
Horizontal starting position control
Vertical starting position control
On-chip clock generator
DISPLAY RAM ORGANIZATION
Description of display RAM codes
Default values of OSD after Power-on-reset
Loading character data into display RAM
Writing character data into display RAM
CHARACTER ROM
Character ROM address map
Character ROM organization
Combination of character font cells
12
12.1
12.2
12.3
12.4
12.5
12.6
12.7
13
13.1
13.2
13.3
14
15
16
16.1
17
18
19
20
21
22
23
23.1
23.2
23.3
24
25
26
PCE84C886
OSD CONTROL REGISTERS
Derivative Register 22
Derivative Register 23
Derivative Register 33
Derivative Register 34
Derivative Register 35
Derivative Register 36
Derivative Register 37
TO FORMAT THE OSD
Number of characters per row
Number of rows per frame
Character size selection for different display
resolutions
8-BIT COUNTER (T3)
I
2
C-BUS INTERFACE
OUTPUT PORTS
Mask options
DERIVATIVE REGISTERS
LIMITING VALUES
DC CHARACTERISTICS
AC CHARACTERISTICS
DEVELOPMENT SUPPORT
PACKAGE OUTLINE
SOLDERING
Introduction
Soldering by dipping or by wave
Repairing soldered joints
DEFINITIONS
LIFE SUPPORT APPLICATIONS
PURCHASE OF PHILIPS I
2
C COMPONENTS
1996 Jan 08
2
Philips Semiconductors
Preliminary specification
Microcontroller for monitor OSD
and auto-sync applications
1
1.1
FEATURES
General
PCE84C886
•
Spacing between character rows: 0, 4, 8 and 12 scan
lines
•
Foreground colours: 8 on a character-by-character
basis
•
Background colours: 8 on a word-by-word basis
•
Background/shadowing modes: 4 modes available, No
background, North shadowing, Box shadowing and
Frame shadowing (raster blanking) on a frame basis
•
On-chip Phase-Locked Loop (PLL) oscillator (auto-sync
with HSYNCN) with programmable oscillator for On
Screen Display (OSD) function
•
Character blinking frequency: programmable using
f
Vsync
divisors of 16, 32, 64 and 128; on a frame basis
•
Character blinking ratios: 1 : 1, 1 : 3 and 3 : 1
•
Programmable active level polarities of VSYNCN,
HSYNCN, R, G, B and FB
•
Flexible display format by using Carriage Return Code
•
Auto display RAM address (DCRAR) incremented after
write operation to the Character Data Register (DCRCR)
•
VSYNCN generates an interrupt (enabled by software)
when VIEN is active.
2
GENERAL DESCRIPTION
•
CMOS 8-bit CPU (enhanced 8048 CPU) with 8 kbytes
system ROM and 192 bytes system RAM
•
One 8-bit timer/event counter (T1) and one 8-bit counter
triggered by external input (T3)
•
Four single level vectored interrupt sources: external
(INTN), counter/timer, I
2
C-bus and VSYNCN
•
2 directly testable inputs T0 and T1
•
On-chip oscillator clock frequency: 1 to 10 MHz
•
On-chip Power-on-reset with low power detector
•
Twelve quasi-bidirectional I/O lines, configuration of
each I/O line individually selected by mask option
•
Idle and Stop modes for reduced power consumption
•
Operating temperature:
−25
to +85
°C
•
Operating voltage: 4.5 to 5.5 V
•
Package: SDIP42.
1.2
Special
•
Master-slave I
2
C-bus interface
•
Four 6-bit Pulse Width Modulated outputs
(PWM4 to PWM7)
•
Four 7-bit Pulse Width Modulated outputs
(PWM0 to PWM3)
•
One 14-bit Pulse Width Modulated output (PWM8)
•
Three 4-bit ADC channels
•
16 derivative I/O ports.
1.3
OSD
•
Maximum dot frequency (f
OSD
): 14 MHz
•
Display RAM: 64
×
10 bits
•
Display character fonts: 62 + 2 special reserved codes
•
Character matrix: 12
×
18 (no spacing between
characters)
•
4 character sizes: 1H/1V, 1H/2V, 1H/3V and 1H/4V
•
64 Horizontal starting positions (4 dots for each step)
•
64 Vertical starting positions (4 scan lines for each step)
3
ORDERING INFORMATION
The PCE84C886 is a member of the 84CXXX CMOS
microcontroller family. It is suitable for use in 14", 15" and
17" auto-sync monitors for OSD and auto-sync
applications. The device uses the PCE84CXX processor
core and has 8 kbytes of ROM and 192 bytes of RAM. I/O
requirements are adequately catered for with 12 general
purpose bidirectional I/O lines plus 16 function combined
I/O lines. 9 PWM analog outputs are provided specifically
for analog control purposes and also three 4-bit ADCs. The
device has an 8-bit counter, suitable for use in pulse
counting applications; an 8-bit timer/counter with
programmable clock and an on-chip programmable PLL
oscillator that generates the OSD clock. In addition to all
these features a master-slave I
2
C-bus interface, 2 directly
testable lines and an enhanced OSD facility for flexible
screen format (64 character types) are also provided.
The block diagram of the PCE84C886 is shown in Fig.1.
PACKAGE
TYPE NUMBER
NAME
PCE84C886
1996 Jan 08
SDIP42
DESCRIPTION
plastic shrink dual in-line package; 42 leads (600 mil)
3
VERSION
SOT270-1