INTEGRATED CIRCUITS
DATA SHEET
PCD8544
48
×
84 pixels matrix LCD
controller/driver
Product specification
File under Integrated Circuits, IC17
1999 Apr 12
Philips Semiconductors
Product specification
48
×
84 pixels matrix LCD controller/driver
CONTENTS
1
2
3
4
5
6
6.1
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
6.1.6
6.1.7
6.1.8
6.1.9
6.1.10
6.1.11
6.1.12
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.7.1
7.8
FEATURES
GENERAL DESCRIPTION
APPLICATIONS
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
Pin functions
R0 to R47 row driver outputs
C0 to C83 column driver outputs
V
SS1
, V
SS2
: negative power supply rails
V
DD1
, V
DD2
: positive power supply rails
V
LCD1
, V
LCD2
: LCD power supply
T1, T2, T3 and T4: test pads
SDIN: serial data line
SCLK: serial clock line
D/C: mode select
SCE: chip enable
OSC: oscillator
RES: reset
FUNCTIONAL DESCRIPTION
Oscillator
Address Counter (AC)
Display Data RAM (DDRAM)
Timing generator
Display address counter
LCD row and column drivers
Addressing
Data structure
Temperature compensation
8
8.1
8.2
8.3
8.3.1
8.3.2
8.3.3
8.4
8.4.1
8.5
8.6
8.7
8.8
8.9
9
10
11
12
12.1
12.2
13
14
14.1
14.2
15
16
17
INSTRUCTIONS
Initialization
Reset function
Function set
Bit PD
Bit V
Bit H
Display control
Bits D and E
Set Y address of RAM
Set X address of RAM
Temperature control
Bias value
Set V
OP
value
LIMITING VALUES
HANDLING
DC CHARACTERISTICS
AC CHARACTERISTICS
Serial interface
Reset
PCD8544
APPLICATION INFORMATION
BONDING PAD LOCATIONS
Bonding pad information
Bonding pad location
TRAY INFORMATION
DEFINITIONS
LIFE SUPPORT APPLICATIONS
1999 Apr 12
2
Philips Semiconductors
Product specification
48
×
84 pixels matrix LCD controller/driver
1
FEATURES
2
GENERAL DESCRIPTION
PCD8544
•
Single chip LCD controller/driver
•
48 row, 84 column outputs
•
Display data RAM 48
×
84 bits
•
On-chip:
– Generation of LCD supply voltage (external supply
also possible)
– Generation of intermediate LCD bias voltages
– Oscillator requires no external components (external
clock also possible).
•
External RES (reset) input pin
•
Serial interface maximum 4.0 Mbits/s
•
CMOS compatible inputs
•
Mux rate: 48
•
Logic supply voltage range V
DD
to V
SS
: 2.7 to 3.3 V
•
Display supply voltage range V
LCD
to V
SS
– 6.0 to 8.5 V with LCD voltage internally generated
(voltage generator enabled)
– 6.0 to 9.0 V with LCD voltage externally supplied
(voltage generator switched-off).
•
Low power consumption, suitable for battery operated
systems
•
Temperature compensation of V
LCD
•
Temperature range:
−25
to +70
°C.
4
ORDERING INFORMATION
The PCD8544 is a low power CMOS LCD controller/driver,
designed to drive a graphic display of 48 rows and
84 columns. All necessary functions for the display are
provided in a single chip, including on-chip generation of
LCD supply and bias voltages, resulting in a minimum of
external components and low power consumption.
The PCD8544 interfaces to microcontrollers through a
serial bus interface.
The PCD8544 is manufactured in n-well CMOS
technology.
3
APPLICATIONS
•
Telecommunications equipment.
PACKAGE
TYPE NUMBER
NAME
PCD8544U
−
DESCRIPTION
chip with bumps in tray; 168 bonding pads + 4 dummy pads
VERSION
−
1999 Apr 12
3
Philips Semiconductors
Product specification
48
×
84 pixels matrix LCD controller/driver
5
BLOCK DIAGRAM
PCD8544
handbook, full pagewidth
C1 to C83
R0 to R47
COLUMN DRIVERS
VLCD2
BIAS
VOLTAGE
GENERATOR
DATA LATCHES
ROW DRIVERS
SHIFT REGISTER
RESET
RES
VLCD1
VLCD
GENERATOR
DISPLAY DATA RAM
(DDRAM)
48
×
84
OSCILLATOR
OSC
VDD1 to VDD2
VSS1 to VSS2
ADDRESS COUNTER
TIMING
GENERATOR
T1
T2
T3
T4
DISPLAY
ADDRESS
COUNTER
DATA
REGISTER
PCD8544
I/O BUFFER
MGL629
SDIN
SCLK
D/C
SCE
Fig.1 Block diagram.
1999 Apr 12
4
Philips Semiconductors
Product specification
48
×
84 pixels matrix LCD controller/driver
6
PINNING
SYMBOL
R0 to R47
C0 to C83
V
SS1
, V
SS2
V
DD1
, V
DD2
V
LCD1
, V
LCD2
T1
T2
T3
T4
SDIN
SCLK
D/C
SCE
OSC
RES
DESCRIPTION
LCD row driver outputs
LCD column driver outputs
ground
supply voltage
LCD supply voltage
test 1 input
test 2 output
test 3 input/output
test 4 input
serial data input
serial clock input
data/command
chip enable
oscillator
external reset input
6.1.8
SCLK:
SERIAL CLOCK LINE
6.1.7
SDIN:
SERIAL DATA LINE
Input for the data line.
6.1.5
PCD8544
V
LCD1
, V
LCD2
: LCD
POWER SUPPLY
Positive power supply for the liquid crystal display. Supply
rails V
LCD1
and V
LCD2
must be connected together.
6.1.6
T1, T2, T3
AND
T4:
TEST PADS
T1, T3 and T4 must be connected to V
SS
, T2 is to be left
open. Not accessible to user.
Input for the clock signal: 0.0 to 4.0 Mbits/s.
6.1.9
D/C:
MODE SELECT
Input to select either command/address or data input.
6.1.10
SCE:
CHIP ENABLE
dummy1, 2, 3, 4 not connected
Note
1. For further details, see Fig.18 and Table 7.
6.1
6.1.1
Pin functions
R0
TO
R47
ROW DRIVER OUTPUTS
The enable pin allows data to be clocked in. The signal is
active LOW.
6.1.11
OSC:
OSCILLATOR
These pads output the row signals.
6.1.2
C0
TO
C83
COLUMN DRIVER OUTPUTS
When the on-chip oscillator is used, this input must be
connected to V
DD
. An external clock signal, if used, is
connected to this input. If the oscillator and external clock
are both inhibited by connecting the OSC pin to V
SS
, the
display is not clocked and may be left in a DC state.
To avoid this, the chip should always be put into
Power-down mode before stopping the clock.
6.1.12
RES:
RESET
These pads output the column signals.
6.1.3
V
SS1
, V
SS2
:
NEGATIVE POWER SUPPLY RAILS
Supply rails V
SS1
and V
SS2
must be connected together.
6.1.4
V
DD1
, V
DD2
:
POSITIVE POWER SUPPLY RAILS
This signal will reset the device and must be applied to
properly initialize the chip. The signal is active LOW.
Supply rails V
DD1
and V
DD2
must be connected together.
1999 Apr 12
5
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