Philips Semiconductors
Product specification
Programmable multi-tone telephone ringer
CONTENTS
1
2
3
4
6
6.1
6.2
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.8.1
7.8.2
7.9
7.10
8
9
10
11
12
13
14
14.1
14.2
14.2.1
14.2.2
14.3
14.3.1
14.3.2
14.3.3
16
FEATURES
GENERAL DESCRIPTION
QUICK REFERENCE DATA
ORDERING INFORMATION
PINNING INFORMATION
Pinning
Pin description
FUNCTIONAL DESCRIPTION
Supply pins (V
DD
and V
SS
)
Oscillator (OSC)
Selection pin input circuit)
Frequency discriminator circuit (FDE and FDI)
Selection of frequency discriminator limits
(FL and FH)
Selection of tone sequences (TS1 and TS2)
Selection of repetition rates (RR1 and RR2)
Drive mode selection (DM)
Loudspeaker mode
PXE mode
Setting of impedance, sound pressure level
and automatic swell (IS1 and IS2)
Optical output (OPT)
LIMITING VALUES
HANDLING
DC CHARACTERISTICS
AC CHARACTERISTICS
APPLICATION INFORMATION
PACKAGE OUTLINES
SOLDERING
Introduction
DIP
Soldering by dipping or by wave
Repairing soldered joints
SO
Reflow soldering
Wave soldering
Repairing soldered joints
LIFE SUPPORT APPLICATIONS
PCD3360
1997 Jan 15
2
Philips Semiconductors
Product specification
Programmable multi-tone telephone ringer
1
FEATURES
2
GENERAL DESCRIPTION
PCD3360
•
Output signals for electro-dynamic transducer
(loudspeaker) or for piezo-electric transducer (PXE)
•
7 basic output frequencies (tones) and a pause
•
4 selectable tone sequences
•
4 selectable repetition rates
•
3 selectable impedance settings
•
3-step automatic swell
•
Delta-modulated output signal that approximates a
sinewave
•
Input ringing frequency discriminator with selectable
upper and lower frequency limits
•
Output for optical signal
•
Customized tone sequences, impedance settings and
automatic swell levels are mask programmable.
3
QUICK REFERENCE DATA
SYMBOL
f
TONE
n
int
f
LL
f
UL
Z
set
t
d(on)
4
PARAMETER
available frequencies
(tones)
number of intervals per tone
sequence
lower limits of frequency
discriminator
upper limits of frequency
discriminator
impedance settings
switch-on delay
The PCD3360 is a CMOS integrated circuit, designed to
replace the electro-mechanical bell in telephone sets.
It meets most postal requirements, with selectivity of
output tone sequences and input ringer frequencies.
Output signals for a loudspeaker or for a piezo-electric
(PXE) transducer are provided. No audio transformer is
required since the loudspeaker is driven in class D.
CONDITIONS
VALUE
553, 600, 667, 800, 1000, 1067,
1333
15 or 16
13.33 or 20
30 or 60
UNIT
Hz
Hz
Hz
kΩ
ms
with 50
Ω
loudspeaker
ringer frequency = 25 Hz
≈7, ≈10.5
or
≈17.5
60 (maximum)
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
NAME
DIP16
SO16
DESCRIPTION
plastic dual in-line package; 16 leads (300 mil)
plastic small outline package; 16 leads; body width 7.5 mm
VERSION
SOT38-4
SOT162-1
PCD3360P
PCD3360T
1997 Jan 15
3
Philips Semiconductors
Product specification
Programmable multi-tone telephone ringer
7
7.1
FUNCTIONAL DESCRIPTION
(see Fig.1)
Supply pins (V
DD
and V
SS
)
7.4
PCD3360
Frequency discriminator circuit (FDE and FDI)
If the supply current (V
DD
) drops below the standby voltage
(V
stb
), the oscillator and most other functions are switched
off and the supply current is reduced to the standby current
(I
stb
). The automatic swell register retains its information
until V
DD
drops further to a value V
AS
at which reset
occurs.
7.2
Oscillator (OSC)
The frequency discriminator circuit prevents the ringer
being activated unintentionally by dial pulses, speech or
other invalid signals.
The circuit is enabled or disabled by input FDE. When FDE
is LOW and V
DD
> V
stb
, the circuit is enabled and FDI acts
as the input for ringing frequency detection. When FDE is
HIGH, the circuit is disabled and FDI becomes the
enable/disable input for tone sequence generation.
When the circuit is enabled, it starts to produce output
ringing tones after one cycle of an appropriate input
frequency is detected at FDI. An input cycle is detected
when either 2 rising or 2 falling edges are received, and
this implies a delay of between 1 and 1.5 input cycles
before output ringing begins. The allowed input frequency
range is set by the states of pins FL and FH, as shown in
Table 2. Output ringing continues for as long as valid input
ringing frequency is detected.
FDI has a Schmitt-trigger action; the levels are set by an
external resistor R2 (see Fig.8) and an internal sink current
that is switched from 20
µA
(typ.) for FDI = LOW to <0.1
µA
for FDI = HIGH. Excess current entering FDI via R2 is
absorbed by internal diodes clamped to V
DD
and V
SS
.
7.5
Selection of frequency discriminator limits
(FL and FH)
The 64 kHz oscillator is operated via an external resistor
and capacitor connected to pin OSC (see Fig.8).
The oscillator signal is divided by two to provide the 32 kHz
internal system clock.
7.3
Selection pin input circuit
(see Fig.3)
Pins FDE, RR1, RR2, DM, IS1, IS2, TS1, TS2, FL and FH
are pulled down internally by a pull-down current I
IH
when
they are connected to V
DD
and by a pull-down resistance
R
IL
when they are connected to V
SS
. Thus when the pins
are open-circuit they are defined LOW. Therefore only a
single-contact switch is required to connect the pins to
V
DD
; yet the supply current is only marginally increased as
I
IH
is very small.
selection
pins
FDE
RR1
RR2
DM
IS1
IS2
TS1
TS2
FL
FH
With the frequency discriminator enabled (V
DD
> V
stb
and
FDE = LOW) the lower and upper limits of the input
frequency are set by the inputs FL and FH as shown by
Table 2.
Table 2
IIH
(1)
Selection of lower and upper frequency
discriminator limits (f
OSC
= 64 kHz)
LOWER
LIMIT
20 Hz
13.3 Hz
FH INPUT
STATE
LOW
HIGH
UPPER
LIMIT
60 Hz
30 Hz
FL INPUT
STATE
PCD3360
VSS
MGD709
LOW
HIGH
(1) Transistor resistance is R
IL
when switched on.
Fig.3 Input circuit of selection pins.
1997 Jan 15
5
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