EVALUATION KIT AVAILABLE
MAX9248/MAX9250
27-Bit, 2.5MHz to 42MHz
DC-Balanced LVDS Deserializers
General Description
The MAX9248/MAX9250 digital video serial-to-parallel
converters deserialize a total of 27 bits during data and
control phases. In the data phase, the LVDS serial input is
converted to 18 bits of parallel video data and in the con-
trol phase, the input is converted to 9 bits of parallel con-
trol data. The separate video and control phases take
advantage of video timing to reduce the serial-data rate.
The MAX9248/MAX9250 pair with the MAX9247 serializer
to form a complete digital video transmission system. For
operating frequencies less than 35MHz, the MAX9248/
MAX9250 can also pair with the MAX9217 serializer.
The MAX9248 features spread-spectrum capability,
allowing output data and clock to spread over a speci-
fied frequency range to reduce EMI. The data and
clock outputs are programmable for a spectrum spread
of ±4% or ±2%. The MAX9250 features output enable
input control to allow data busing.
Proprietary data decoding reduces EMI and provides
DC balance. The DC balance allows AC-coupling, pro-
viding isolation between the transmitting and receiving
ends of the interface. The MAX9248/MAX9250 feature a
selectable rising or falling output latch edge.
ESD tolerance is specified for ISO 10605 with ±10kV
Contact Discharge and ±30kV Air-Gap Discharge.
The MAX9248/MAX9250 operate from a +3.3V ±10%
core supply and feature a separate output supply for
interfacing to 1.8V to 3.3V logic-level inputs. These
devices are available in a 48-lead LQFP package and
are specified from -40°C to +85°C or -40°C to +105°C.
Features
o
Programmable ±4% or ±2% Spread-Spectrum
Output for Reduced EMI (MAX9248)
o
Proprietary Data Decoding for DC Balance and
Reduced EMI
o
Control Data Deserialized During Video Blanking
o
Five Control Data Inputs are Single-Bit-Error
Tolerant
o
Output Transition Time is Scaled to Operating
Frequency for Reduced EMI
o
Staggered Output Switching Reduces EMI
o
Output Enable Allows Busing of Outputs
(MAX9250)
o
Clock Pulse Stretch on Lock
o
Wide ±2% Reference Clock Tolerance
o
Synchronizes to MAX9247 Serializer Without
External Control
o
ISO 10605 and IEC 61000-4-2 Level 4
ESD Protection
o
Separate Output Supply Allows Interface to 1.8V
to 3.3V Logic
o
+3.3V Core Power Supply
o
Space-Saving LQFP Package
o
-40°C to +85°C and -40°C to +105°C Operating
Temperature Ranges
Applications
Navigation System Displays
In-Vehicle Entertainment Systems
Video Cameras
LCD Displays
PART
MAX9248ECM+
MAX9248ECM/V+
MAX9248GCM+
MAX9248GCM/V+
MAX9250ECM+
MAX9250ECM/V+
MAX9250GCM+
MAX9250GCM/V+
Ordering Information
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +105°C
-40°C to +105°C
-40°C to +85°C
-40°C to +85°C
-40°C to +105°C
-40°C to +105°C
PIN-PACKAGE
48 LQFP
48 LQFP
48 LQFP
48 LQFP
48 LQFP
48 LQFP
48 LQFP
48 LQFP
+Denotes
a lead(Pb)-free/RoHS-compliant package.
/V denotes an automotive qualified part.
Pin Configuration appears at end of data sheet.
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
19-3943; Rev 4; 7/14
MAX9248/MAX9250
27-Bit, 2.5MHz to 42MHz
DC-Balanced LVDS Deserializers
ABSOLUTE MAXIMUM RATINGS
V
CC_
to _GND........................................................-0.5V to +4.0V
Any Ground to Any Ground...................................-0.5V to +0.5V
IN+, IN- to LVDSGND............................................-0.5V to +4.0V
IN+, IN- Short Circuit to LVDSGND or V
CCLVDS
........Continuous
(R/F, OUTEN, RNG_, REFCLK, SS
PWRDWN)
to GND................................. -0.5V to (V
CC
+ 0.5V)
(RGB_OUT[17:0], CNTL_OUT[8:0], DE_OUT, PCLK_OUT,
LOCK)
to V
CCOGND
.............................-0.5V to (V
CCO
+ 0.5V)
Continuous Power Dissipation (T
A
= +70°C)
48-Lead LQFP (derate 21.7mW/°C above +70°C).....1739mW
ESD Protection
Machine Model (R
D
= 0Ω, C
S
= 200pF)
All Pins to GND............................................................±200V
Human Body Model (R
D
= 1.5kΩ, C
S
= 100pF)
All Pins to GND..............................................................±2kV
ISO 10605 (R
D
= 2kΩ, C
S
= 330pF)
Contact Discharge (IN+, IN-) to GND ............................±10kV
Air-Gap Discharge (IN+, IN-) to GND ............................±30kV
IEC 61000-4-2 (R
D
= 330Ω, C
S
= 150pF)
Contact Discharge (IN+, IN-) to GND ............................±10kV
Air-Gap Discharge (IN+, IN-) to GND ............................±15kV
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC_
= +3.0V to +3.6V,
PWRDWN
= high, differential input voltage
⏐V
ID
⏐
= 0.05V to 1.2V, input common-mode voltage V
CM
=
⏐V
ID
/ 2⏐
to V
CC
-
⏐V
ID
/ 2⏐, T
A
= -40°C to +105°C, unless otherwise noted. Typical values are at V
CC_
= +3.3V,
⏐V
ID
⏐
= 0.2V, V
CM
= 1.2V,
T
A
= +25°C.) (Notes 1, 2)
PARAMETER
High-Level Input Voltage
Low-Level Input Voltage
SYMBOL
V
IH
V
IL
V
IN
= -0.3V to 0 (MAX9248/
MAX9250ECM),
PWRDWN
= V = -0.15V to 0 (MAX9248/
IN
high or low
MAX9250GCM),
V
IN
= 0 to (V
CC
+ 0.3V)
Input Clamp Voltage
V
CL
I
CL
= -18mA
I
OH
= -100µA
High-Level Output Voltage
V
OH
I
OH
= -2mA, RNG1 = high
I
OH
= -2mA, RNG1 = low
I
OL
= 100µA
Low-Level Output Voltage
V
OL
I
OL
= 2mA, RNG1 = high
I
OL
= 2mA, RNG1 = low
High-Impedance Output Current
Output Short-Circuit Current
I
OZ
I
OS
PWRDWN
= low or OUTEN = low,
V
O
= -0.3V to (V
CCO
+ 0.3V)
RNG1 = high, V
O
= 0
RNG1 = low, V
O
= 0
-10
-10
-7
V
CCO
- 0.1
V
CCO
- 0.35
V
CCO
- 0.4
0.1
0.3
0.35
+10
-50
-40
µA
mA
V
V
CONDITIONS
MIN
2.0
-0.3
TYP
MAX
V
CC
+ 0.3
+0.8
UNITS
V
V
SINGLE-ENDED INPUTS (R/F, OUTEN, RNG0, RNG1, REFCLK,
PWRDWN,
SS)
Input Current
I
IN
-100
+20
µA
-20
+20
-1.5
V
SINGLE-ENDED OUTPUTS (RGB_OUT[17:0], CNTL_OUT[8:0], DE_OUT, PCLK_OUT,
LOCK)
2
Maxim Integrated
MAX9248/MAX9250
27-Bit, 2.5MHz to 42MHz
DC-Balanced LVDS Deserializers
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC_
= +3.0V to +3.6V,
PWRDWN
= high, differential input voltage
⏐V
ID
⏐
= 0.05V to 1.2V, input common-mode voltage V
CM
=
⏐V
ID
/ 2⏐
to V
CC
-
⏐V
ID
/ 2⏐, T
A
= -40°C to +105°C, unless otherwise noted. Typical values are at V
CC_
= +3.3V,
⏐V
ID
⏐
= 0.2V, V
CM
= 1.2V,
T
A
= +25°C.) (Notes 1, 2)
PARAMETER
LVDS INPUT (IN+, IN-)
Differential Input High Threshold
Differential Input Low Threshold
Input Current
V
TH
V
TL
I
IN+,
I
IN-
(Note 3)
(Note 3)
PWRDWN
= high or low (Note 3)
PWRDWN
= MAX9248/MAX9250ECM
high or low
MAX9248/MAX9250GCM
Input Bias Resistor (Note 3)
R
IB
V
CC_
=
MAX9248/MAX9250ECM
0 or open,
PWRDWN
=
0 or open,
MAX9248/MAX9250GCM
Figure 1
V
CC_
= 0 or open,
PWRDWN
= 0 or open (Note 3)
2.5MHz
5MHz
5MHz
10MHz
10MHz
20MHz
20MHz
42MHz
2.5MHz
5MHz
5MHz
10MHz
10MHz
20MHz
20MHz
RNG1 = high
RNG0 = high
Power-Down Supply Current
I
CCZ
(Note 4)
35MHz
42MHz
-50
-40
42
42
42
60
60
60
+40
78
88
78
kΩ
50
mV
mV
µA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
42
-60
60
88
+60
µA
Power-Off Input Current
POWER SUPPLY
I
INO+,
I
INO-
RNG1 = low
RNG0 = low
MAX9250
C
L
= 8pF,
worst-case
pattern,
Figure 2
RNG1 = low
RNG0 = high
RNG1 = high
RNG0 = low
RNG1 = high
RNG0 = high
Worst-Case Supply Current
RNG1 = low
RNG0 = low
MAX9248
C
L
= 8pF,
worst-case
pattern,
Figure 2
RNG1 = low
RNG0 = high
RNG1 = high
RNG0 = low
19
33
28
49
33
59
45
89
31
48
40
70
49
87
68
100
120
50
µA
mA
Maxim Integrated
3
MAX9248/MAX9250
27-Bit, 2.5MHz to 42MHz
DC-Balanced LVDS Deserializers
AC ELECTRICAL CHARACTERISTICS
(V
CC_
= +3.0V to +3.6V, C
L
= 8pF,
PWRDWN
= high, differential input voltage
⏐V
ID
⏐
= 0.1V to 1.2V, input common-mode voltage
V
CM
=
⏐V
ID
/ 2⏐ to V
CC
-
⏐V
ID
/ 2⏐, T
A
= -40°C to +105°C, unless otherwise noted. Typical values are at V
CC_
= +3.3V,
⏐V
ID
⏐
= 0.2V,
V
CM
= 1.2V, T
A
= +25°C.) (Notes 3, 5)
PARAMETER
REFCLK TIMING REQUIREMENTS
Period
Frequency
Frequency Variation
Duty Cycle
Transition Time
SWITCHING CHARACTERISTICS
MAX9248/
MAX9250ECM
MAX9248/
MAX9250GCM
MAX9248/
MAX9250ECM
MAX9248/
MAX9250GCM
RNG1 = high
Output Fall Time
t
R
Figure 3
RNG1 = low
MAX9248/
MAX9250ECM
MAX9248/
MAX9250ECM
MAX9248/
MAX9250GCM
PCLK_OUT High Time
PCLK_OUT Low Time
Data Valid Before PCLK_OUT
Data Valid After PCLK_OUT
PLL Lock to REFCLK
t
HIGH
t
LOW
t
DVB
t
DVA
t
PLLREF
Figure 4
Figure 4
Figure 5
Figure 5
MAX9248, Figure 8
MAX9250, Figure 7
2.2
2.2
2.8
2.8
1.9
2.3
2.3
0.4 x
t
T
0.4 x
t
T
0.35 x t
T
0.35 x t
T
0.45 x
t
T
0.45 x
t
T
0.4 x
0.4 x
33,600 x t
T
16,928 x t
T
4.6
4.9
ns
5.2
6.1
4.0
4.3
5.2
0.6 x
t
T
0.6 x
t
T
ns
ns
ns
ns
ns
ns
t
T
f
CLK
f
CLK
DC
t
TRAN
20% to 80%
MAX9248/MAX9250ECM
MAX9248/MAX9250GCM
MAX9248/MAX9250ECM
MAX9248/MAX9250GCM
REFCLK to serializer PCLK_IN,
worst-case output pattern (Figure 2)
23.8
28.6
2.5
2.5
-2.0
40
50
400.0
400.0
42.0
35.0
+2.0
60
6
ns
MHz
%
%
ns
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
RNG1 = high
Output Rise Time
t
R
Figure 3
RNG1 = low
4
Maxim Integrated
MAX9248/MAX9250
27-Bit, 2.5MHz to 42MHz
DC-Balanced LVDS Deserializers
AC ELECTRICAL CHARACTERISTICS (continued)
(V
CC_
= +3.0V to +3.6V, C
L
= 8pF,
PWRDWN
= high, differential input voltage
⏐V
ID
⏐
= 0.1V to 1.2V, input common-mode voltage
V
CM
=
⏐V
ID
/ 2⏐ to V
CC
-
⏐V
ID
/ 2⏐, T
A
= -40°C to +105°C, unless otherwise noted. Typical values are at V
CC_
= +3.3V,
⏐V
ID
⏐
= 0.2V,
V
CM
= 1.2V, T
A
= +25°C.) (Notes 3, 5)
PARAMETER
SYMBOL
SS = high,
Figure 11
Spread-Spectrum Output
Frequency (MAX9248)
f
PCLK_OUT
SS = low,
Figure 11
Spread-Spectrum Modulation
Frequency
Power-Down Delay
SS Change Delay
Output Enable Time
Output Disable Time
CONDITIONS
Maximum output
frequency
Minimum output
frequency
Maximum output
frequency
Minimum output
frequency
MIN
TYP
MAX
f
REFCLK
+ 4.4%
f
REFCLK
- 3.6%
f
REFCLK
+ 2.2%
f
REFCLK
- 1.8%
kHz
100
32,800
x t
T
10
10
30
30
ns
ns
ns
ns
UNITS
f
REFCLK
f
REFCLK
+ 3.6% + 4.0%
f
REFCLK
f
REFCLK
- 4.4%
- 4.0%
f
REFCLK
f
REFCLK
+ 1.8% + 2.0%
f
REFCLK
f
REFCLK
- 2.2%
- 2.0%
f
REFCLK
/
1024
MHz
f
SSM
t
PDD
t
SSPLL
t
OE
t
OZ
Figure 11
Figures 7, 8
MAX9248, Figure 17
MAX9250, Figure 8
MAX9250, Figure 9
Note 1:
Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except V
TH
and V
TL
.
Note 2:
Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production
tested at T
A
= +25°C.
Note 3:
Parameters are guaranteed by design and characterization, and are not production tested. Limits are set at
±6
sigma.
Note 4:
All LVTTL/LVCMOS inputs, except
PWRDWN
at
≤
0.3V or
≥
V
CC
- 0.3V.
PWRDWN
is
≤
0.3V, REFCLK is static.
Note 5:
C
L
includes probe and test jig capacitance.
Maxim Integrated
5
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