PALLV16V8-10PC datasheet, PDF - EEWORLD Datasheet

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PALLV16V8-10PC: DescriptionLow Voltage, Zero Power 20-Pin EE CMOS Universal Programmable Array Logic; CategoryProgrammable logic devices Programmable logic; File Size266KB，22 Pages; ManufacturerLattice; Websitehttp://www.latticesemi.com

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PALLV16V8-10PC Overview

Low Voltage, Zero Power 20-Pin EE CMOS Universal Programmable Array Logic

PALLV16V8-10PC Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	DIP
package instruction	PLASTIC, DIP-20
Contacts	20
Reach Compliance Code	_compli
ECCN code	EAR99
Architecture	PAL-TYPE
maximum clock frequency	71.4 MHz
JESD-30 code	R-PDIP-T20
JESD-609 code	e0
length	26.1366 mm
Dedicated input times	8
Number of I/O lines	8
Number of entries	18
Output times	8
Number of product terms	64
Number of terminals	20
Maximum operating temperature	75 °C
Minimum operating temperature
organize	8 DEDICATED INPUTS, 8 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP20,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	3.3 V
Programmable logic type	EE PLD
propagation delay	10 ns
Certification status	Not Qualified
Maximum seat height	4.953 mm
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL EXTENDED
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	7.62 mm
Base Number Matches	1

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FINAL

COM’L:-10

IND:-20

PALLV16V8-10 and PALLV16V8Z

Low Voltage, Zero Power 20-Pin EE CMOS

Universal Programmable Array Logic

DISTINCTIVE CHARACTERISTICS

Low-voltage operation, 3.3 V JEDEC compatible

— V

= +3.0 V to +3.6 V

Pin and function compatible with all 20-pin PAL

devices

Electrically-erasable CMOS technology provides reconﬁgurable logic and full testabili

Direct plug-in replacement for the PAL16R8 series

Designed to interface with both 3.3-V and 5-V logic

Outputs programmable as registered or combinatorial in any combination

Programmable output polarity

Programmable enable/disable control

Preloadable output registers for testability

Automatic register reset on power up

Cost-effective 20-pin plastic DIP, PLCC, and SOIC packages

Extensive third-party software and programmer support

Fully tested for 100% programming and functional yields and high reliability

GENERAL DESCRIPTION

The PALLV16V8 is an advanced PAL device built with low-voltage, high-speed, electrically

CMOS technology. It is functionally compatible with all 20-pin GAL devices. The macro

provide a universal device architecture. The PALLV16V8 will directly replace the PAL16R8

exception of the PAL16C1.

The PALLV16V8Z provides zero standby power and high speed. At 30-

A maximum sta

current, the PALLV16V8Z allows battery powered operation for an extended period.

The PALLV16V8 utilizes the familiar sum-of-products (AND/OR) architecture that allows

implement complex logic functions easily and efﬁciently. Multiple levels of combinatorial

always be reduced to sum-of-products form, taking advantage of the very wide input g

available in PAL devices. The equations are programmed into the device through ﬂoating-

in the AND logic array that can be erased electrically.

The ﬁxed OR array allows up to eight data product terms per output for logic functions.

of these products feeds the output macrocell. Each macrocell can be programmed as reg

combinatorial with an active-high or active-low output. The output conﬁguration is deter

two global bits and one local bit controlling four multiplexers in each macrocell.

Publication#

17713

Amendment/0

Rev:

Issue Date:

November 1998

PALLV16V8-10PC Related Products

	PALLV16V8-10PC	PLV16V8	PALLV16V8Z-20PI	PALLV16V8Z-20JI	PALLV16V8-10SC	PALLV16V8-10JC
Description	Low Voltage, Zero Power 20-Pin EE CMOS Universal Programmable Array Logic	Low Voltage, Zero Power 20-Pin EE CMOS Universal Programmable Array Logic	Low Voltage, Zero Power 20-Pin EE CMOS Universal Programmable Array Logic	Low Voltage, Zero Power 20-Pin EE CMOS Universal Programmable Array Logic	Low Voltage, Zero Power 20-Pin EE CMOS Universal Programmable Array Logic	Low Voltage, Zero Power 20-Pin EE CMOS Universal Programmable Array Logic
Is it Rohs certified?	incompatible	-	incompatible	incompatible	incompatible	incompatible
Parts packaging code	DIP	-	DIP	QLCC	-	QLCC
package instruction	PLASTIC, DIP-20	-	PLASTIC, DIP-20	PLASTIC, LCC-20	PLASTIC, SOIC-20	PLASTIC, LCC-20
Contacts	20	-	20	20	-	20
Reach Compliance Code	_compli	-	_compli	_compli	unknow	_compli
ECCN code	EAR99	-	EAR99	EAR99	EAR99	EAR99
Architecture	PAL-TYPE	-	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE
maximum clock frequency	71.4 MHz	-	40 MHz	40 MHz	71.4 MHz	71.4 MHz
JESD-30 code	R-PDIP-T20	-	R-PDIP-T20	S-PQCC-J20	R-PDSO-G20	S-PQCC-J20
JESD-609 code	e0	-	e0	e0	e0	e0
length	26.1366 mm	-	26.1366 mm	8.9662 mm	12.8 mm	8.9662 mm
Dedicated input times	8	-	8	8	8	8
Number of I/O lines	8	-	8	8	8	8
Number of entries	18	-	18	18	18	18
Output times	8	-	8	8	8	8
Number of product terms	64	-	64	64	64	64
Number of terminals	20	-	20	20	20	20
Maximum operating temperature	75 °C	-	85 °C	85 °C	75 °C	75 °C
organize	8 DEDICATED INPUTS, 8 I/O	-	8 DEDICATED INPUTS, 8 I/O	8 DEDICATED INPUTS, 8 I/O	8 DEDICATED INPUTS, 8 I/O	8 DEDICATED INPUTS, 8 I/O
Output function	MACROCELL	-	MACROCELL	MACROCELL	MACROCELL	MACROCELL
Package body material	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	-	DIP	QCCJ	SOP	QCCJ
Encapsulate equivalent code	DIP20,.3	-	DIP20,.3	LDCC20,.4SQ	SOP20,.4	LDCC20,.4SQ
Package shape	RECTANGULAR	-	RECTANGULAR	SQUARE	RECTANGULAR	SQUARE
Package form	IN-LINE	-	IN-LINE	CHIP CARRIER	SMALL OUTLINE	CHIP CARRIER
power supply	3.3 V	-	3.3 V	3.3 V	3.3 V	3.3 V
Programmable logic type	EE PLD	-	EE PLD	EE PLD	EE PLD	EE PLD
propagation delay	10 ns	-	20 ns	20 ns	10 ns	10 ns
Certification status	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	4.953 mm	-	4.953 mm	4.572 mm	2.65 mm	4.572 mm
Maximum supply voltage	3.6 V	-	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage	3 V	-	3 V	3 V	3 V	3 V
Nominal supply voltage	3.3 V	-	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	NO	-	NO	YES	YES	YES
technology	CMOS	-	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL EXTENDED	-	INDUSTRIAL	INDUSTRIAL	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED
Terminal surface	Tin/Lead (Sn85Pb15)	-	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn85Pb15)
Terminal form	THROUGH-HOLE	-	THROUGH-HOLE	J BEND	GULL WING	J BEND
Terminal pitch	2.54 mm	-	2.54 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	-	DUAL	QUAD	DUAL	QUAD
width	7.62 mm	-	7.62 mm	8.9662 mm	7.5 mm	8.9662 mm

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