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FT6188L45DC

Description
Standard SRAM, 16KX4, 45ns, CMOS, CDIP24, 0.300 INCH, CERAMIC, DIP-24
Categorystorage    storage   
File Size992KB,13 Pages
ManufacturerForce Technologies Ltd.
Download Datasheet Parametric View All

FT6188L45DC Overview

Standard SRAM, 16KX4, 45ns, CMOS, CDIP24, 0.300 INCH, CERAMIC, DIP-24

FT6188L45DC Parametric

Parameter NameAttribute value
MakerForce Technologies Ltd.
Parts packaging codeDIP
package instructionDIP,
Contacts24
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum access time45 ns
JESD-30 codeR-CDIP-T24
length27.55 mm
memory density65536 bit
Memory IC TypeSTANDARD SRAM
memory width4
Number of functions1
Number of terminals24
word count16384 words
character code16000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize16KX4
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height5.71 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width15.24 mm
Base Number Matches1
FT6188/FT6188L
ULTRA HIGH SPEED 16K x 4
STATIC CMOS RAM
FEATURES
Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)
– 10/12/15/20/25 ns (Commercial)
– 12/15/20/25/35 (Industrial)
– 15/20/25/35/45 ns (Military)
Low Power (Commercial/Military)
– 715 mW Active – 12/15
– 550/660 mW Active – 20/25/35/45
– 193/220 mW Standby (TTL Input)
– 83/110 mW Standby (CMOS Input)
FT6188
– 15 mW Standby (CMOS Input)
(FT6188L Military)
Single 5V±10% Power Supply
Data Retention with 2.0V Supply
(FT6188L Military)
Three-State Outputs
TTL/CMOS Compatible Outputs
Fully TTL Compatible Inputs
Standard Pinout (JEDEC Approved)
– 22-Pin 300 mil DIP
– 24-Pin 300 mil SOJ
– 22-Pin 290 x 490 mil LCC
DESCRIPTION
The
FT6188
and
FT6188L
are 65,536-bit ultra high speed
static RAMs organised as 16K x 4. The CMOS memories
require no clocks or refreshing and have equal access and
cycle times. Inputs and outputs are fully TTL-compatible.
The RAMs operate from a single 5V±10% tolerance power
supply. With battery backup, data integrity is maintained for
supply voltages down to 2.0V. Current drain is typically 10
µA from a 2.0V supply.
Access times as fast as 10 nanoseconds are available,
permitting greatly enhanced system speeds. CMOS is
utilised to reduce power consumption to a low 715mW
active, 193mW standby and only 5mW in the
FT6188L
version.
The
FT6188
and
FT6188L
are available in 22-pin 300 mil
DIP, 24-pin 300 mil SOJ and 22-pin LCC packages provid-
ing excellent board level densities.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
DIP (P3, D3, C3)
LCC (L3)
For SOJ pin configuration, please see end of datasheet.
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