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KSP12

Description
Darlington Transistor
CategoryDiscrete semiconductor    The transistor   
File Size31KB,4 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric View All

KSP12 Overview

Darlington Transistor

KSP12 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerFairchild
package instructionCYLINDRICAL, O-PBCY-T3
Reach Compliance Codeunknow
Is SamacsysN
ConfigurationDARLINGTON
Minimum DC current gain (hFE)20000
JEDEC-95 codeTO-92
JESD-30 codeO-PBCY-T3
JESD-609 codee0
Number of components1
Number of terminals3
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeROUND
Package formCYLINDRICAL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeNPN
Maximum power dissipation(Abs)0.625 W
Certification statusNot Qualified
surface mountNO
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
Transistor component materialsSILICON
Base Number Matches1
KSP12
KSP12
Darlington Transistor
• Collector-Emitter Voltage: V
CES
=20V
• Collector Power Dissipation: P
C
(max)=625mW
1
TO-92
1. Emitter 2. Base 3. Collector
NPN Epitaxial Silicon Darlington Transistor
Absolute Maximum Ratings
T
a
=25°C unless otherwise noted
Symbol
V
CES
V
EBO
P
C
T
J
T
STG
Collector-Emitter Voltage
Emitter-Base Voltage
Collector Power Dissipation
Junction Temperature
Storage Temperature
Parameter
Value
20
10
625
150
-55 ~ 150
Units
V
V
mW
°C
°C
Electrical Characteristics
T
a
=25°C unless otherwise noted
Symbol
BV
CES
I
CBO
I
CES
I
EBO
h
FE
V
CE
(sat)
V
BE
(on)
Parameter
Collector-Emitter Breakdown Voltage
Collector Cut-off Current
Collector Cut-off Current
Emitter Cut-off Current
DC Current Gain
Collector-Emitter Saturation Voltage
Base-Emitter On Voltage
Test Condition
I
C
=100µA, I
B
=0
V
CB
=15V, I
E
=0
V
CE
=15V, I
B
=0
V
EC
=10V, I
C
=0
V
CE
=5V, I
C
=10mA
I
C
=10mA, I
B
=0.01mA
V
CE
=5V, I
C
=10mA
20K
1
1.4
V
V
Min.
20
Typ.
.
Max.
100
100
100
Units
V
nA
nA
nA
©2002 Fairchild Semiconductor Corporation
Rev. A2, September 2002
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