Preliminary Technical Data
FEATURES
600 mA/1000 mA, 2.5 MHz Buck-Boost
DC-to-DC Converter
ADP2503/ADP2504
GENERAL DESCRIPTION
The ADP2503/ADP2504 are high efficiency, low quiescent
current step-up/step-down dc-to-dc converters that can operate
at input voltages above, below, or equal to the regulated output
voltage. The power switches and synchronous rectifiers are
internal to minimize external part count. At high load currents,
the ADP2503/ADP2504 use a current-mode, fixed frequency
PWM control scheme for optimal stability and transient response.
To ensure the longest battery life in portable applications, the
ADP2503/ADP2504 have an optional power save mode that
reduces the switching frequency under light load conditions.
For wireless and other low noise applications where variable
frequency power save mode may cause interference, the logic
control input sync forces fixed frequency PWM operation
under all load conditions.
The ADP2503/ADP2504 can run from input voltages between
2.3 V and 5.5 V, allowing single lithium or lithium polymer cell,
multiple alkaline or NiMH cells, PCMCIA, USB, and other
standard power sources. The ADP2503/ADP2504 have fixed
output options ranging from 2.8 V to 5 V. Compensation is
internal to minimize the number of external components.
During logic-controlled shutdown, the input is disconnected
from the output and draws less than 1 μA from the input source.
Operating as a boost converter, the ADP2503/ADP2504 feature
a true load disconnect function that isolates the load from the
power source. Other key features include under voltage lockout
to prevent deep battery discharge and soft start to prevent input
current overshoot at startup.
1 mm height profile
Compact PCB footprint
Seamless transition between modes
38 μA typical quiescent current
2.5 MHz operation enables 1 μH inductor
Input voltage: 2.3 V to 5.5 V
Fixed output voltage: 2.8 V to 5.0 V
600 mA (ADP2503) and 1000 mA (ADP2504) output options
Boost converter configuration with load disconnect
Sync pin with three different modes:
Power save mode (PSM) for improved light load efficiency
Forced fixed frequency operation mode
Synchronization with external clock
Internal compensation
Soft start
Enable/shutdown logic input
Overtemperature protection
Short-circuit protection
Undervoltage lockout protection
Small 10-lead 3 mm × 3 mm LFCSP/QFN package
APPLICATIONS
Wireless handsets
Digital cameras/portable audio players
Miniature hard disk power supplies
USB powered devices
TYPICAL APPLICATION CIRCUIT
1.0µH
SW1
V
IN
2.3V TO 5.5V
SW2
ADP2503
PVIN
VIN
VOUT
FB
V
OUT
2.8V TO 5V
10µF
22µF
SYNC
07475-001
EN
ON
OFF
AGND PGND
Figure 1. Application Circuit
Rev. PrB
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ADP2503/ADP2504
TABLE OF CONTENTS
Features .............................................................................................. 1
Preliminary Technical Data
Reverse Current Limit ............................................................... 10
Power save Mode........................................................................ 10
Soft Start ...................................................................................... 10
Enable........................................................................................... 11
Undervoltage Lockout ............................................................... 11
Thermal Shutdown .................................................................... 11
Short Circuit Protection ............................................................ 11
Applications Information .............................................................. 12
Inductor Selection ...................................................................... 12
PCB Layout Guidelines.................................................................. 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 15
Applications ....................................................................................... 1
General Description ......................................................................... 1
Typical Application Circuit ............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Description .............................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 10
REVISION HISTORY
8/08—Revision PrB
Rev. PrB | Page 2 of 16
Preliminary Technical Data
SPECIFICATIONS
ADP2503/ADP2504
V
IN
= 3.6 V, V
OUT
= 3.3 V, @ T
A
= T
J
= −40°C to +125°C for minimum/maximum specifications and T
A
= +25°C for typical specifications,
unless otherwise noted.
1
Table 1.
Parameters
INPUT CHARACTERISTICS
Input Voltage Range
Undervoltage Lockout Threshold
Undervoltage Lockout Threshold
OUTPUT CHARACTERISTICS
Output Voltage Range
Feedback Voltage
Feedback Impedance
Output Voltage Initial Accuracy
(PWM Mode, No Load)
Load and Line Regulation
CURRENT CHARACTERISTICS
Quiescent Current (V
IN
)
Shutdown Current
SWITCH CHARACTERISTICS
N-Channel Switches (LFCSP)
P-Channel Switches (LFCSP)
P-Channel Leakage
Switch Current Limit
ADP2504
ADP2503
Reverse Current Limit
OSCILLATOR AND STARTUP
Oscillator Frequency
On Time PMOS1 (Buck Mode)
On Time NMOS2 (Boost Mode)
Sync Clock Frequency
Sync Clock Minimum Off Time
Soft Start Period
LOGIC LEVEL CHARACTERISTICS
EN, SYNC Input High Threshold
EN, SYNC Input Low Threshold
EN, SYNC Leakage Current
THERMAL CHARACTERISTICS
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
1
Conditions
Min
2.3
2.2
2.13
2.8
0.495
Typ
Max
5.5
2.3
2.23
5.0
0.55
+2
0.5
0.6
Unit
V
V
V
V
V
kΩ
%
%
%
μA
μA
mΩ
mΩ
μA
A
A
A
MHz
ns
ns
MHz
ns
μs
V
V
μA
°C
°C
V
IN
rising
V
IN
falling
2.25
2.18
0.5
450
ADP2503/ADP2504 (PWM operation, no load)
V
IN
= 2.3 V to 3.6 V, I
LOAD
= 0mA to 500mA, forced PWM mode
V
IN
= 2.3 V to 5.5 V, I
LOAD
= 0mA to 500mA, forced PWM mode
I
OUT
= 0 mA, V mode = EN = V
IN
= 3.6 V, device not switching
T
A
= T
J
= −40°C to +85°C
V
IN
= 3.6 V
V
IN
= V
OUT
= 3.6 V
T
J
= −40°C to +85°C
−2
38
0.2
150
150
50
1
1
1.3
1.0
2.0
1.4
1.1
2.5
2.8
200
2.8
200
1.2
−1
+0.1
150
25
0.4
+1
V
IN
= 2.3 V to 5.5 V
Minimum duty cycle = 30%
Maximum duty cycle = 50% (×2)
2.2
130
2.2
160
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
Rev. PrB | Page 3 of 16
ADP2503/ADP2504
ABSOLUTE MAXIMUM RATINGS
Table 1.
Parameter
PVIN, VIN, SW1, SW2, VOUT, SYNC,
EN, FB
PGND to AGND
Operating Ambient Temperature
Operating Junction Temperature
Storage Temperature
Lead Temperature
Soldering (10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
ESD Human Body Model
ESD Charged Device Model
ESD Machine Model
Rating
−0.3 V to +6 V
−0.3 V to 0.3 V
−40°C to +85°C
−40°C to +125°C
−65°C to +150°C
300°C
215°C
220°C
±1000 V
±500 V
±100 V
Preliminary Technical Data
THERMAL RESISTANCE
θ
JA
is specified for device soldered JEDEC2S2P PCB. For a
typical printed circuit board of a handset, the total thermal
resistance is higher. For correct operation up to 85°C ambient
temperature the total thermal resistance must not exceed
100 K/W.
Table 2.
Package Type
10-Lead LFCSP (QFN)
θ
JA
84
Unit
°C/W
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Absolute maximum ratings apply individually only, not in
combination. Unless otherwise specified, all other voltages are
referenced to GND.
Rev. PrB | Page 4 of 16
Preliminary Technical Data
PIN CONFIGURATION AND FUNCTION DESCRIPTION
VOUT 1
SW2 2
PGND 3
SW1 4
PVIN 5
ADP2503/ADP2504
ADP2503/
ADP2504
TOP VIEW
(Not to scale)
10 FB
9
8
7
6
AGND
VIN
SYNC
EN
07475-003
*CONNECT PADDLE TO GND.
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
Mnemonic
VOUT
SW2
PGND
SW1
PVIN
EN
SYNC
Description
The output of the ADP2503/ADP2504. Connect the output capacitor between VOUT and PGND.
Power Switch 2 Connection. This is the internal connection to the input PMOS and NMOS switches.
Connect SW2 to the inductor with a short, wide track.
Power GND. Connect the input and output capacitors and PGND pin to a PGND plane.
Power Switch 1 Connection. This is the internal connection to the output PMOS and NMOS switches.
Connect SW1 to the inductor with a short, wide track.
Power Input. This the input to the buck-boost power switches. Place a 10 μF capacitor between PVIN and
PGND as close as possible to the ADP2503/ADP2504.
Enable. Drive EN high to turn on the ADP2503/ADP2504. Bring EN low to put the part into shutdown
mode.
The SYNC pin permits the ADP2503/ADP2504 to operate in three different modes.
Normal operation: with SYNC driven low, the ADP2503/ADP2504 operates at 2.5 MHz PWM mode for
heavy and medium loads, and moves to power save mode (PSM) mode for light loads.
Forced PWM operation: with SYNC driven high, the ADP2503/ADP2504 operates at fixed 2.5 MHz PWM
mode for all load conditions.
SYNC mode: to synchronize the ADP2503/ADP2504 switching to an external signal, drive this pin with a
clock between 2.2 MHz and 2.8 MHz. The SYNC signal must have on and off times greater than 160 ns.
Analog Power Supply. This is the supply for the ADP2503/ADP2504 internal circuitry.
Analog Ground.
Output Feedback. This is an input to the internal error amplifier.
Connect the paddle to PGND.
8
9
10
EP
VIN
AGND
FB
Paddle
Rev. PrB | Page 5 of 16