PALC16R4L-25PC datasheet, PDF - EEWORLD Datasheet

PALC16R4L-25PC: Descriptionreprogrammable cmos; CategoryProgrammable logic devices Programmable logic; File Size778KB，14 Pages; ManufacturerCypress Semiconductor

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PALC16R4L-25PC Overview

reprogrammable cmos

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Cypress Semiconductor
Parts packaging code	DIP
package instruction	0.300 INCH, PLASTIC, DIP-20
Contacts	20
Reach Compliance Code	not_compliant
Other features	1 EXTERNAL CLOCK
Architecture	PAL-TYPE
maximum clock frequency	28.5 MHz
JESD-30 code	R-PDIP-T20
JESD-609 code	e0
length	25.527 mm
Dedicated input times	8
Number of I/O lines	4
Number of entries	16
Output times	4
Number of product terms	64
Number of terminals	20
Maximum operating temperature	75 °C
Minimum operating temperature
organize	8 DEDICATED INPUTS, 4 I/O
Output function	MIXED
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP20,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	OT PLD
propagation delay	25 ns
Certification status	Not Qualified
Maximum seat height	4.826 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL EXTENDED
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm
Base Number Matches	1

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