TC74VHCT245AF/AFT/AFK
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74VHCT245AF,TC74VHCT245AFT,TC74VHCT245AFK
Octal Bus Transceiver
The TC74VHCT245A is an advanced high speed CMOS OCTAL
BUS TRANSCEIVER fabricated with silicon gate C
2
MOS
technology. It achieves the high speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the CMOS
low power dissipation.
It is intended for two-way asynchronous communication
between data busses. The direction of data transmission is
determined by the level of the DIR input.
The enable input (
G
) can be used to disable the device so that
the busses are effectively isolated.
The input voltage are compatible with TTL output voltage.
This device may be used as a level converter for interfacing 3.3
V to 5 V system.
Input protection and output circuit ensure that 0 to 5.5 V can
be applied to the input and output
(Note)
pins without regard to
the supply voltage. These structure prevents device destruction
due to mismatched supply and input/output voltages such as
battery back up, hot board insertion, etc.
Note:
Output in off-state
TC74VHCT245AFK
TC74VHCT245AF
TC74VHCT245AFT
Features (Note)
•
•
•
•
•
•
•
High speed: t
pd
=
4.9 ns (typ.) at V
CC
=
5 V
Low power dissipation: I
CC
=
4
μA
(max) at Ta = 25°C
Compatible with TTL outputs: V
IL
=
0.8 V (max)
V
IH
=
2.0 V (min)
Power down protection is provided on all inputs and outputs
Balanced propagation delays: t
pLH
∼
t
pHL
−
Low noise: V
OLP
=
1.6 V (max)
Pin and function compatible with the 74 series
(74AC/HC/F/ALS/LS etc.) 245 type.
Note:
Do not apply a signal to any bus terminal when it is in
the output mode. Damage may result.
All floating (high impedance) bus terminals must
have their input levels fixed by means of pull up or
pull down resistors.
Weight
SOP20-P-300-1.27A
: 0.22 g (typ.)
TSSOP20-P-0044-0.65A : 0.08 g (typ.)
VSSOP20-P-0030-0.50 : 0.03 g (typ.)
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2007-10-01
TC74VHCT245AF/AFT/AFK
Pin Assignment
IEC Logic Symbol
(19)
(1)
G3
3 EN 1 [BA]
3 EN 2 [AB]
1
2
A2
A3
A4
A5
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(17)
(16)
(15)
(14)
(13)
(12)
(11)
B2
B3
B4
B5
B6
B7
B8
(18)
B1
DIR
A1
A2
A3
A4
A5
A6
A7
A8
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
(top view)
V
CC
G
B1
B2
B3
B4
B5
B6
B7
B8
G
DIR
A1
(2)
GND 10
A6
A7
A8
Truth Table
Inputs
Function
A Bus
Output
Input
Z
B Bus
Input
Output
G
L
L
H
DIR
L
H
X
Output
A=B
B=A
Z
X: Don’t care
Z: High impedance
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2007-10-01
TC74VHCT245AF/AFT/AFK
Absolute Maximum Ratings (Note 1)
Characteristics
Supply voltage range
DC input voltage (DIR, G )
DC bus I/O voltage
Input diode current
Output diode current
DC output current
DC V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
I/O
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
Rating
−
0.5 to 7.0
−
0.5 to 7.0
−
0.5 to 7.0
−
0.5 to V
CC
+
0.5
−
20
±
20
±
25
±
75
Unit
V
V
(Note 2)
(Note 3)
V
mA
(Note 4)
mA
mA
mA
mW
°C
180
−
65 to 150
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: Output in off-state
Note 3: High or low state. I
OUT
absolute maximum rating must be observed.
Note 4: V
OUT
< GND, V
OUT
> V
CC
Operating Ranges (Note 1)
Characteristics
Supply voltage
Input voltage (DIR, G )
Bus I/O voltage
Operating temperature
Input rise and fall time
Symbol
V
CC
V
IN
V
I/O
T
opr
dt/dV
Rating
4.5 to 5.5
0 to 5.5
0 to 5.5
0 to V
CC
−
40 to 85
Unit
V
V
(Note 2)
(Note 3)
V
°C
ns/V
0 to 20
Note 1: The operating ranges are required to ensure the normal operation of the device. Unused inputs and bus
inputs must be tied to either VCC or GND. Please connect both bus inputs and the bus outputs with VCC or
GND when the I/O of the bus terminal changes by the function. In this case, please note that the output is
not short-circuited.
Note 2: Output in off-state
Note 3: High or low state
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2007-10-01
TC74VHCT245AF/AFT/AFK
Electrical Characteristics
DC Characteristics
Characteristics
High-level input
voltage
Low-level input
voltage
High-level output
voltage
Low-level output
voltage
3-state output
off-state current
Input leakage
current
Quiescent supply
current
Output leakage
current
Symbol
Test Condition
V
CC
(V)
V
IH
V
IL
V
OH
⎯
⎯
Ta
=
25°C
Min
2.0
⎯
Ta
=
−
40 to 85°C
Max
⎯
Unit
Typ.
⎯
⎯
Min
2.0
⎯
Max
⎯
4.5 to
5.5
4.5 to
5.5
4.5
4.5
4.5
4.5
5.5
V
V
V
0.8
⎯
⎯
0.8
⎯
⎯
V
IN
I
OH
= −
50
μ
A
=
V
IH
or
I
OH
= −
8 mA
V
IL
V
IN
I
OL
=
50
μ
A
=
V
IH
or
I
OL
=
8 mA
V
IL
V
IN
=
V
IH
or V
IL
V
OUT
=
V
CC
or GND
V
IN
=
5.5 V or GND
V
IN
=
V
CC
or GND
Per input: V
IN
=
3.4 V
Other input: V
CC
or GND
V
OUT
=
5.5 V
4.4
3.94
⎯
⎯
⎯
4.5
⎯
4.4
3.80
⎯
⎯
⎯
V
OL
0.0
⎯
⎯
0.1
0.36
±
0.25
0.1
0.44
±
2.50
V
I
OZ
I
IN
I
CC
I
CCT
I
OPD
μ
A
0 to 5.5
5.5
5.5
0
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
±
0.1
⎯
⎯
⎯
⎯
±
1.0
μ
A
μ
A
4.0
1.35
0.5
40.0
1.50
5.0
mA
μ
A
AC Characteristics
(input: t
r
=
t
f
=
3 ns)
Characteristics
Symbol
t
pLH
t
pHL
t
pZL
t
pZH
t
pLZ
t
pHZ
t
osLH
t
osHL
C
IN
C
I/O
C
PD
DIR,
G
An, Bn
(Note 2)
Test Condition
V
CC
(V)
Propagation delay
time
3-state output enable
time
3-state output disable
time
Output to output skew
Input capacitance
Bus input capacitance
Power dissipation
capacitance
⎯
Ta
=
25°C
C
L
(pF)
15
50
15
50
50
Min
⎯
⎯
⎯
⎯
⎯
Ta
=
−
40 to 85°C
Max
7.7
8.7
13.8
14.8
15.4
Min
1.0
1.0
1.0
1.0
1.0
Max
8.5
9.5
15.0
16.0
16.5
Unit
Typ.
4.9
5.4
9.4
9.9
10.1
5.0
±
0.5
ns
R
L
=
1 k
Ω
5.0
±
0.5
ns
R
L
=
1 k
Ω
5.0
±
0.5
ns
(Note 1) 5.0
±
0.5
50
⎯
⎯
⎯
⎯
⎯
1.0
10
⎯
⎯
⎯
⎯
⎯
⎯
1.0
10
⎯
⎯
ns
pF
pF
pF
4
13
16
Note 1: Parameter guaranteed by design.
t
osLH
= |t
pLHm
−
t
pLHn
|,
t
osHL
= |t
pHLm
−
t
pHLn
|
Note 2: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
I
CC (opr)
=
C
PD
·V
CC
·f
IN
+
I
CC
/8 (per bit)
4
2007-10-01
TC74VHCT245AF/AFT/AFK
Noise Characteristics
(input: t
r
=
t
f
=
3 ns)
Characteristics
Quiet output maximum dynamic V
OL
Quiet output minimum dynamic V
OL
Minimum high level dynamic input
voltage
Maximum low level dynamic input
voltage
Symbol
V
OLP
V
OLV
V
IHD
V
ILD
C
L
=
50 pF
C
L
=
50 pF
C
L
=
50 pF
C
L
=
50 pF
Test Condition
V
CC
(V)
5.0
5.0
5.0
5.0
Ta
=
25°C
Typ.
1.1
−
1.1
⎯
⎯
Limit
1.5
−
1.5
Unit
V
V
V
V
2.0
0.8
5
2007-10-01
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