EEWORLDEEWORLDEEWORLD

Part Number

Search

8N3QV01EG-1018CDI

Description
LVPECL Output Clock Oscillator
CategoryPassive components    oscillator   
File Size229KB,22 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

8N3QV01EG-1018CDI Online Shopping

Suppliers Part Number Price MOQ In stock  
8N3QV01EG-1018CDI - - View Buy Now

8N3QV01EG-1018CDI Overview

LVPECL Output Clock Oscillator

8N3QV01EG-1018CDI Parametric

Parameter NameAttribute value
Objectid1266566745
Reach Compliance Codecompliant
Oscillator typeLVPECL
Quad-Frequency Programmable
VCXO
IDT8N3QV01 Rev G
DATA SHEET
General Description
The IDT8N3QV01 is a Quad-Frequency Programmable VCXO with
very flexible frequency and pull-range programming capabilities.
The device uses IDT’s fourth generation FemtoClock® NG
technology for an optimum of high clock frequency and low phase
noise performance. The device accepts 2.5V or 3.3V supply and is
packaged in a small, lead-free (RoHS 6) 10-lead Ceramic 5mm x
7mm x 1.55mm package.
Besides the 4 default power-up frequencies set by the FSEL0 and
FSEL1 pins, the IDT8N3QV01 can be programmed via the I
2
C
interface to any output clock frequency between 15.476MHz to
866.67MHz and from 975MHz to 1,300MHz to a very high degree of
precision with a frequency step size of 435.9Hz ÷N (N is the PLL
output divider). Since the FSEL0 and FSEL1 pins are mapped to 4
independent PLL M and N divider registers (P, MINT, MFRAC and
N), reprogramming those registers to other frequencies under
control of FSEL0 and FSEL1 is supported. The extended
temperature range supports wireless infrastructure, tele-
communication and networking end equipment requirements. The
device is a member of the high-performance clock family from IDT.
Features
Fourth generation FemtoClock® NG technology
Programmable clock output frequency from 15.476MHz to
866.67MHz and from 975MHz to 1,300MHz
Four power-up default frequencies (see part number order
codes), reprogrammable by I
2
C
I
2
C programming interface for the output clock frequency, APR
and internal PLL control registers
Frequency programming resolution is 435.9Hz ÷N
Absolute pull-range (APR) programmable from ±4.5 to
±754.5ppm
One 2.5V or 3.3V LVPECL differential clock output
Two control inputs for the power-up default frequency
LVCMOS/LVTTL compatible control inputs
RMS phase jitter @ 156.25MHz (12kHz - 20MHz):
0.487ps (typical)
RMS phase jitter @ 156.25MHz (1kHz - 40MHz):
0.614ps (typical)
2.5V or 3.3V supply voltage modes
-40°C to 85°C ambient operating temperature
Available in Lead-free (RoHS 6) package
Block Diagram
OSC
114.285 MHz
÷MINT,
MFRAC
2
VC
FSEL1
FSEL0
SCLK
SDATA
OE
Pulldown
Pulldown
Pullup
Pullup
Pullup
Pin Assignment
÷P
PFD
&
LPF
FemtoClock® NG
VCO
1950-2600MHz
÷N
Q
nQ
SDATA
SCLK
10
VC 1
OE 2
V
EE
3
4
FSEL0
9
8
7
V
CC
nQ
Q
5
6
A/D
7
25
Configuration Register (ROM)
(Frequency, APR, Polarity)
I
2
C Control
7
IDT8N3QV01 Rev G
10-lead Ceramic 5mm x 7mm x 1.55mm
package body
CD Package
Top View
IDT8N3QV01GCD REVISION A
FEBRUARY 24, 2012
1
©2012 Integrated Device Technology, Inc.
FSEL1
Hardware Design of BLDC
[i=s]This post was last edited by RCSN on 2017-2-26 21:07[/i] [size=5][font=黑体] First of all, it is for spam posts. Secondly, it is for spam posts. Even if I am scared, I still have to post spam posts...
RCSN Microcontroller MCU
Design of control system for indoor air purifier
This project mainly designs an air purifier, which detects the content of indoor air pollutants and the activity level of indoor personnel, and then controls the air purifier to sterilize after analys...
sqwk89 51mcu
PCB component packaging knowledge!
Device packaging refers to connecting the circuit pins on the silicon chip to the external connector with wires so as to connect with other devices. The packaging form refers to the shell used to inst...
qinyonglyz PCB Design
What is the use of the web.xml file under WEB-INF in the JSP site?
What is the use of the web.xml file under WEB-INF in the JSP site? What does it usually contain?...
jscaptain Embedded System
Can STM32's DCMI be used to read parallel port ADC data?
I want to read a parallel ADC through STM32. The number of bits of ADC is 14 bits, and the timing of 60MSPSADC is SCLK gives a clock, and D0~D14 will output a data. STM32's DCMI supports 14-bit parall...
littleshrimp stm32/stm8
arm9 (timer counter) external buzzer how to choose the clock frequency
Connect a peripheral buzzer. I/O connected. Timer counter should be set. Look at the datasheet. There are 5 Timer Counter Clocks. TIMER_CLOCK1 MCK/2 TIMER_CLOCK2 MCK/8 TIMER_CLOCK3 MCK/32 TIMER_CLOCK4...
chuhui ARM Technology

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 103  1433  1447  350  2487  3  29  30  8  51 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号