Setting bit[11:18] = starting address. After reading back the first data byte,
master issues Stop bit.
4
IDTCV123
PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR
COMMERCIAL TEMPERATURE RANGE
CONTROL REGISTERS
N PROGRAMMING PROCEDURE
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Use Index byte write.
For N programming, the user only needs to access Byte17, Byte 25, and Byte8.
1.
2.
3.
Write Byte17 for CPU PLL N, CPU f = N* Resolution, see resolution table below Byte17.
Write Byte25 for SRC PLL N, SRC f = N*0.666667, PCI = SRC f /3, SATA f = SRC f.
Enable N Programming bit, Byte8 bit1. Once this bit is enabled, any N value will be changed on the fly.
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•
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Center spread only works when the N Programming bit is enabled. Down spread is OK even N Programming bit is disabled
It is OK to change N value to any value on the bench test board. In the system, IDT recommends the stepping change. It is unknown how much
the system can sustain for each stepping change; the estimate is about 5. If the N changes too much in one step, the system will likely hang.
Note that SATA is with SRC PLL. This SATA Hard Drive might not operate during SRC N programming.
Most of the Bytes, from Byte8-Byte31, are used to adjust output waveforms and SSC modulation profiles. The power on setting will be changed according
to each power on frequency selection. To avoid mistakes, don’t write on those byte (be careful about Block Write). It is suggested to use the Index Byte
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