LPC1754FBD80K datasheet, PDF - EEWORLD Datasheet

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LPC1754FBD80K: DescriptionRISC Microcontroller; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1008KB，80 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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LPC1754FBD80K Overview

RISC Microcontroller

LPC1754FBD80K Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	8367493948
Reach Compliance Code	compliant
Country Of Origin	Mainland China, Taiwan
ECCN code	3A991.A.2
Factory Lead Time	52 weeks
Samacsys Manufacturer	NXP
Samacsys Modified On	2022-12-27 12:55:46
YTEOL	5
Has ADC	YES
Address bus width
bit size	32
CPU series	CORTEX-M3
maximum clock frequency	25 MHz
DAC channel	YES
DMA channel	YES
External data bus width
JESD-609 code	e3
length	12 mm
Humidity sensitivity level	2
Number of I/O lines	52
Number of terminals	80
On-chip program ROM width	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
encapsulated code	LFQFP
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260
RAM (bytes)	32768
rom(word)	131072
ROM programmability	FLASH
speed	100 MHz
Maximum supply voltage	3.6 V
Minimum supply voltage	2.4 V
Nominal supply voltage	3.3 V
surface mount	YES
Terminal surface	Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	12 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC

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LPC1759/58/56/54/52/51

32-bit ARM Cortex-M3 MCU; up to 512 kB flash and 64 kB

SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN

Rev. 8.6 — 18 August 2015

Product data sheet

1. General description

The LPC1759/58/56/54/52/51 are ARM Cortex-M3 based microcontrollers for embedded

applications featuring a high level of integration and low power consumption. The ARM

Cortex-M3 is a next generation core that offers system enhancements such as enhanced

debug features and a higher level of support block integration.

The LPC1758/56/57/54/52/51 operate at CPU frequencies of up to 100 MHz. The

LPC1759 operates at CPU frequencies of up to 120 MHz. The ARM Cortex-M3 CPU

incorporates a 3-stage pipeline and uses a Harvard architecture with separate local

instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3

CPU also includes an internal prefetch unit that supports speculative branching.

The peripheral complement of the LPC1759/58/56/54/52/51 includes up to 512 kB of flash

memory, up to 64 kB of data memory, Ethernet MAC, USB Device/Host/OTG interface,

8-channel general purpose DMA controller, 4 UARTs, 2 CAN channels, 2 SSP controllers,

SPI interface, 2 I

C-bus interfaces, 2-input plus 2-output I

S-bus interface, 6 channel

12-bit ADC, 10-bit DAC, motor control PWM, Quadrature Encoder interface, 4 general

purpose timers, 6-output general purpose PWM, ultra-low power Real-Time Clock (RTC)

with separate battery supply, and up to 52 general purpose I/O pins.

For additional documentation, see

Section 19 “References”.

2. Features and benefits



ARM Cortex-M3 processor, running at frequencies of up to 100 MHz

(LPC1758/56/57/54/52/51) or of up to 120 MHz (LPC1759). A Memory Protection Unit

(MPU) supporting eight regions is included.



ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).



Up to 512 kB on-chip flash programming memory. Enhanced flash memory accelerator

enables high-speed 120 MHz operation with zero wait states.



In-System Programming (ISP) and In-Application Programming (IAP) via on-chip

bootloader software.



On-chip SRAM includes:



Up to 32 kB of SRAM on the CPU with local code/data bus for high-performance

CPU access.



Two/one 16 kB SRAM blocks with separate access paths for higher throughput.

These SRAM blocks may be used for Ethernet (LPC1758 only), USB, and DMA

memory, as well as for general purpose CPU instruction and data storage.

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