89H32NT8BG2ZAHLGI datasheet, PDF

Datasheet> All Categories > semiconductor> Analog mixed-signal IC> 89H32NT8BG2ZAHLGI

89H32NT8BG2ZAHLGI: DescriptionIC pci SW 32lane 8port 484bga; Categorysemiconductor Analog mixed-signal IC; File Size316KB，7 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/; Environmental Compliance

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89H32NT8BG2ZAHLGI Overview

IC pci SW 32lane 8port 484bga

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32-Lane 8-Port PCIe® Gen2

System Interconnect Switch with

Non-Transparent Bridging

◆

89HPES32NT8BG2

Product Brief

The 89HPES32NT8BG2 is a member of the IDT family of PCI

Express® switching solutions. The PES32NT8BG2 is a 32-lane, 8-port

system interconnect switch optimized for PCI Express Gen2 packet

switching in high-performance applications, supporting multiple simulta-

neous peer-to-peer traffic flows. Target applications include multi-host or

intelligent I/O based systems where inter-domain communication is

required, such as servers, storage, communications, and embedded

systems.

With Non-Transparent Bridging functionality and innovative Switch

Partitioning feature, the PES32NT8BG2 allows true multi-host or multi-

processor communications in a single device. Integrated DMA control-

lers enable high-performance system design by off-loading data transfer

operations across memories from the processors. Each lane is capable

of 5 GT/s link speed in both directions and is fully compliant with PCI

Express Base Specification 2.1.

Device Overview

Features

◆

High Performance Non-Blocking Switch Architecture

–

32-lane, 8-port PCIe switch with flexible port configuration

–

Integrated SerDes supports 5.0 GT/s Gen2 and 2.5 GT/s

Gen1 operation

–

Delivers up to 32 GBps (256 Gbps) of switching capacity

–

Supports 128 Bytes to 2 KB maximum payload size

–

Low latency cut-through architecture

–

Supports one virtual channel and eight traffic classes

◆

Port Configurability

–

Eight x4 switch ports

•

Adjacent x4 ports can be merged to achieve x8 port widths

–

Automatic per port link width negotiation

(x8 --> x4 --> x2 --> x1)

–

Crosslink support

–

Automatic lane reversal

–

Per lane SerDes configuration

•

De-emphasis

•

Receive equalization

•

Drive strength

◆

Innovative Switch Partitioning Feature

–

Supports up to 8 fully independent switch partitions

–

Logically independent switches in the same device

–

Configurable downstream port device numbering

–

Supports dynamic reconfiguration of switch partitions

•

Dynamic port reconfiguration — downstream, upstream,

non-transparent bridge

•

Dynamic migration of ports between partitions

•

Movable upstream port within and between switch partitions

Non-Transparent Bridging (NTB) Support

–

Supports up to 8 NT endpoints per switch, each endpoint can

communicate with other switch partitions or external PCIe

domains or CPUs

–

6 BARs per NT Endpoint

•

Bar address translation

•

All BARs support 32/64-bit base and limit address translation

•

Two BARs (BAR2 and BAR4) support look-up table based

address translation

–

32 inbound and outbound doorbell registers

–

4 inbound and outbound message registers

–

Supports up to 64 masters

–

Unlimited number of outstanding transactions

◆

Multicast

–

Compliant with the PCI-SIG multicast

–

Supports 64 multicast groups

–

Supports multicast across non-transparent port

–

Multicast overlay mechanism support

–

ECRC regeneration support

◆

Integrated Direct Memory Access (DMA) Controllers

–

Supports up to 2 DMA upstream ports, each with 2 DMA chan-

nels

–

Supports 32-bit and 64-bit memory-to-memory transfers

•

Fly-by translation provides reduced latency and increased

performance over buffered approach

•

Supports arbitrary source and destination address alignment

•

Supports intra- as well as inter-partition data transfers using

the non-transparent endpoint

–

Supports DMA transfers to multicast groups

–

Linked list descriptor-based operation

–

Flexible addressing modes

•

Linear addressing

•

Constant addressing

◆

Quality of Service (QoS)

–

Port arbitration

•

Round robin

–

Request metering

•

IDT proprietary feature that balances bandwidth among

switch ports for maximum system throughput

–

High performance switch core architecture

•

Combined Input Output Queued (CIOQ) switch architecture

with large buffers

◆

Clocking

–

Supports 100 MHz and 125 MHz reference clock frequencies

–

Flexible port clocking modes

IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.

1 of 7

2009 Integrated Device Technology, Inc.

September 15, 2009

89H32NT8BG2ZAHLGI Related Products

	89H32NT8BG2ZAHLGI	89H32NT8BG2ZCHLI	89H32NT8BG2ZCHLGI8	89H32NT8BG2ZBHLGI	89H32NT8BG2ZBHLG	89H32NT8BG2ZAHL8	89H32NT8BG2ZAHL
Description	IC pci SW 32lane 8port 484bga	pci interface IC pciE switch	pci interface IC pciE switch	pci interface IC pciE switch	pci interface IC pciE switch	IC pci SW 32lane 8port 484bga	IC pci SW 32lane 8port 484bga
Manufacture	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	-	-
Product Category	-	PCI Interface IC	PCI Interface IC	PCI Interface IC	PCI Interface IC	-	-
RoHS	-	N	Yes	Yes	Yes	-	-
Type	-	Switch - PCIe	Switch - PCIe	Switch - PCIe	Switch - PCIe	-	-
Maximum Clock Frequency	-	125 MHz	125 MHz	125 MHz	125 MHz	-	-
Number of Lanes	-	32 Lane	32 Lane	32 Lane	32 Lane	-	-
Number of Ports	-	8 P	8 P	8 P	8 P	-	-
Operating Supply Voltage	-	1 V, 2.5 V, 3.3 V	1 V, 2.5 V, 3.3 V	1 V, 2.5 V, 3.3 V	1 V, 2.5 V, 3.3 V	-	-
Maximum Operating Temperature	-	+ 85 C	+ 85 C	+ 85 C	+ 70 C	-	-
Mounting Style	-	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT	-	-
Package / Case	-	FCBGA-484	FCBGA-484	FCBGA-484	FCBGA-484	-	-
Data Bus Width	-	32/64 bi	32/64 bi	32/64 bi	32/64 bi	-	-
Maximum Data Rate	-	256 Gbps	256 Gbps	256 Gbps	256 Gbps	-	-
Minimum Operating Temperature	-	- 40 C	- 40 C	- 40 C	0 C	-	-
Packaging	-	Tray	Reel	Tray	Tray	-	-
Factory Pack Quantity	-	60	600	60	60	-	-
Versi	-	Gen2	Gen2	Gen2	Gen2	-	-

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