CS3845B
CS3845B
Current Mode PWM Control Circuit
with 50% Max Duty Cycle
Description
The CS3845B provides all the neces-
sary features to implement off-line
fixed frequency current-mode control
with a minimum number of external
components.
The CS3845B incorporates a precision
temperature-controlled oscillator to
minimize variations in frequency. An
internal toggle flip-flop, which blanks
the output off every other clock cycle,
ensures that the duty-cycle never
exceeds 50%. The undervoltage lock-
out feature ensures that VREF is stabi-
lized within specification before the
output stage is enabled.
The CS3845B
has been optimized for lower start up
current (500µA max).
Other features include 1% trimmed
band gap reference, pulse-by-pulse
current limiting, and a high-current
totem pole output for driving capaci-
tive loads.
Features
s
Optimized for Off-line Use
s
Temperature
Compensated Oscillator
s
50% Maximum Duty-cycle
Clamp
s
Low Start-up Current
(500µA max)
s
Pulse-by-pulse Current
Limiting
s
Undervoltage Active Pull
Down
s
Double Pulse Suppression
s
1% Trimmed Bandgap
Reference
s
High Current Totem Pole
Output
Absolute Maximum Ratings
Supply Voltage (I
CC
<30mA) ..........................................................Self Limiting
Supply Voltage (Low Impedance Source)...................................................30V
Output Current ...............................................................................................±1A
Output Energy (Capacitive Load) .................................................................5µJ
Analog Inputs (V
FB
, V
SENSE
)...........................................................-0.3V to 5.5V
Error Amp Output Sink Current...............................................................10mA
Lead Temperature Soldering
Wave Solder (through hole styles only) ..........10 sec. max, 260°C peak
Reflow (SMD styles only) ...........60 sec. max above 183°C, 230°C peak
Block Diagram
Package Options
8 Lead PDIP & SO
V
CC
V
CC
Undervoltage Lock-out
V
CC
Pwr
COMP
V
FB
1
2
3
4
8
7
6
5
V
REF
V
CC
V
OUT
Gnd
34V
Gnd
8.4V/7.6V
V
FB
Error
Amplifier
-
+
OSC
2.50V
Set/
5.0 Volt
Reset Reference
Internal
Bias
R
V
REF
Undervoltage
Lockout
Toggle
Flip-Flop
V
REF
Sense
OSC
14 Lead SO Narrow
COMP
1
NC
2
NOR
V
OUT
14
13
12
11
10
9
8
COMP
V
REF
NC
V
CC
V
CC
Pwr
V
OUT
Gnd
Pwr Gnd
R
Oscillator
V
FB
3
2 R
R
Sense
1V
Current PWM
Sensing Latch
Comparator
S
Pwr Gnd
R
NC
4
Sense
5
NC
6
OSC
7
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
Rev. 11/19/98
1
A
®
Company
CS3845B
Electrical Characteristics: 0≤T
A
≤70˚C,
V
CC
=15V; R
T
=10kΩ, C
T
=3.3nF for sawtooth mode, unless otherwise stated
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
s
Reference Section
Output Voltage
Line Regulation
Load Regulation
Temperature Stability
Total Output Variation
Output Noise Voltage
Long Term Stability
Output Short Circuit
s
Oscillator Section
Initial Accuracy
Voltage Stability
Temperature Stability
Amplitude
Discharge
Sawtooth Mode, T
J
=25˚C
12≤V
CC
≤25V
Sawtooth Mode T
MIN
≤T
A
≤T
MAX
(Note 1)
V
OSC
(peak to peak)(Note 1)
T
J
=25°C; (Note 1)
T
MIN
≤T
A
≤T
MAX
(Note 1)
7.5
7.2
47
52
0.2
5
17
8.3
9.3
9.5
57
1.0
kHz
%
%
V
mA
mA
T
J
=25˚C, I
REF
=1mA
12≤V
CC
≤25V
1≤I
REF
≤20mA
(Note 1)
Line, Load, Temp. (Note 1)
10Hz≤f≤10kHz, T
J
=25˚C (Note 1)
T
A
=125˚C, 1000 Hrs. (Note 1)
T
A
=25˚C
-30
4.82
50
5
-100
25
-180
4.90
5.00
6
6
0.2
5.10
20
25
0.4
5.18
V
mV
mV
mV/˚C
V
µV
mV
mA
s
Error Amp Section
Input Voltage
Input Bias Current
AVOL
Unity Gain Bandwidth
PSRR
Output Sink Current
Output Source Current
V
OUT
HIGH
V
OUT
LOW
s
Current Sense Section
Gain
Maximum Input Signal
PSRR
Input Bias Current
Delay to Output
s
Output Section
Output Low Level
Output High Level
Rise Time
Fall Time
I
SINK
=20mA
I
SINK
=200mA
I
SOURCE
=20mA
I
SOURCE
=200mA
T
J
=25˚C, C
L
=1nF (Note 1)
T
J
=25˚C, C
L
=1nF (Note 1)
13.0
12.0
0.1
1.5
13.5
13.5
50
50
150
150
0.4
2.2
V
V
V
V
ns
ns
(Notes 2&3)
V
COMP
=5V (Note 2)
12≤V
CC
≤25V
(Note 2)
V
Sense
=0V
T
J
=25˚C (Note 1)
2.85
0.9
3.00
1.0
70
-2
150
-10
300
3.15
1.1
V/V
V
dB
µA
ns
V
COMP
=2.5V
V
FB
=0V
2≤V
OUT
≤4V
(Note 1)
12≤V
CC
≤25V
V
FB
=2.7V, V
COMP
=1.1V
V
FB
=2.3V, V
COMP
=5V
V
FB
=2.3V, R
L
15kΩ to Gnd
V
FB
=2.7V, R
L
=15kΩ to V
REF
65
0.7
60
2
-0.5
5
2.42
2.50
-0.3
90
1.0
70
6
-0.8
6
0.7
1.1
2.58
-2.0
V
µA
dB
MHz
dB
mA
mA
V
V
2
CS3845B
Electrical Characteristics: continued
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
s
Total Standby Current
Start-Up Current
Operating Supply Current
V
CC
Zener Voltage
s
PWM Section
Maximum Duty Cycle
Minimum Duty Cycle
s
Under-Voltage Lockout Section
Start Threshold
Min. Operating Voltage
Notes:
300
V
FB
=V
Sense
=0V R
T
=10kΩ, C
T
=3.3nF
I
CC
=25mA
11
34
500
17
µA
mA
V
46
48
50
0
%
%
7.8
After Turn On
7.0
8.4
7.6
∆V
COMP
∆V
Sense
9.0
8.2
V
V
1. These parameters, although guaranteed, are not 100% test-
ed in production.
2. Parameter measured at trip point of latch with V
FB
=0
3. Gain defined as: A =
; 0
≤
V
Sense
≤
0.8V.
Package Pin Description
PACKAGE PIN #
PIN SYMBOL
FUNCTION
8L PDIP & SO
1
2
3
4
5
6
7
8
14L SO
1
3
5
7
9
10
12
14
8
11
2, 4, 6, 13
COMP
V
FB
Sense
OSC
Gnd
V
OUT
V
CC
V
REF
Pwr Gnd
V
CC
Pwr
NC
Error amp output, used to compensate error amplifier
Error amp inverting input
Noninverting input in Current Sense Comparator
Oscillator timing network with Capacitor to Gnd, resistor
to V
REF
Ground
Output drive pin
Positive power supply
Output of 5V internal reference
Output driver Gnd
Output driver positive supply
No Connection
3
CS3845B
Test Circuit
V
REF
R
T
2N2222
100kΩ
4.7kΩ
1kΩ
Error Amp
Adjust
4.7kΩ
5kΩ
A
COMP
V
REF
0.1µF
V
CC
V
FB
V
CC
CS-3845B
Sense
Adjust
Sense
V
OUT
0.1µF
1kΩ
1W
V
OUT
OSC
Gnd
Gnd
C
T
Circuit Description
Undervoltage Lockout
During Undervoltage Lockout (Figure 1), the output driv-
er is biased to sink minor amounts of current. The output
should be shunted to ground with a resistor to prevent
activating the power switch with extraneous leakage cur-
rents.
PWM Waveform
To generate the PWM waveform, the control voltage from
the error amplifier is compared to a current sense signal
which represents the peak output inductor current (Figure
2). An increase in V
CC
causes the inductor current slope to
increase, thus reducing the duty cycle. This is an inherent
feed-forward characteristic of current mode control, since
the control voltage does not have to change during
changes of input supply voltage.
When the power supply sees a sudden large output cur-
rent increase, the control voltage will increase allowing
the duty cycle to momentarily increase. Since the duty
cycle tends to exceed the maximum allowed to prevent
transformer saturation in some power supplies, the inter-
nal oscillator waveform provides the maximum duty cycle
clamp as programmed by the selection of OSC compo-
nents.
V
CC
ON/OFF Command
to reset of IC
CSX845B
V
ON
V
OFF
8.4V
7.6V
I
CC
<15mA
<1mA
V
ON
V
OFF
V
CC
Figure 1: Startup voltage for CS3845B.
4
CS3845B
Circuit Description: continued
Setting the Oscillator
V
OSC
OSC
RESET
Toggle
F/F Output
EA Output
Switch
Current
V
CC
The parameters T
c
and T
d
can be determined as follows:
t
c
= R
T
C
T
ln
t
d
= R
T
C
T
ln
(
(
V
REF
- V
lower
V
REF
- V
upper
)
)
V
REF
- I
d
R
T
- V
lower
V
REF
- I
d
R
T
- V
upper
I
O
Substituting in typical values for the parameters in the
above formulas:
V
REF
= 5.0V, V
upper
= 2.7V, V
lower
= 1.0V, I
d
= 8.3mA,
then
t
c
≈
0.5534R
T
C
T
t
d
= R
T
C
T
ln
V
O
Figure 2: Timing Diagram
(
2.3 - 0.0083 R
T
4.0 - 0.0083 R
T
)
V
upper
V
lower
t
on
t
C
t
on =
t
C
t
off =
t
C+
2t
d
Figure 3: Timing Parameters.
For better accuracy R
T
should be
≥10kΩ.
Grounding
t
off
t
d
High peak currents associated with capacitive loads neces-
sitate careful grounding techniques. Timing and bypass
capacitors should be connected close to Gnd in a single
point ground.
The transistor and 5kΩ potentiometer are used to sample
the oscillator waveform and apply an adjustable ramp to
Sense.
5
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