DSC2033
Low-Jitter Configurable Dual LVDS Oscillator
General Description
The DSC2033 series of high performance
dual output LVDS oscillators utilize a proven
silicon MEMS technology to provide excellent
jitter and stability while incorporating
additional device functionality.
The two
outputs are controlled by separate supply
voltages to allow for high output isolation.
The frequencies of the outputs can be
identical or independently derived from a
common PLL frequency source.
The
DSC2033 has provision for up to eight user-
defined
pre-programmed,
pin-selectable
output frequency combinations.
DSC2033 is packaged in a 14-pin 3.2x2.5
mm
QFN
package
and
available
in
temperature grades from Ext. Commercial to
Industrial.
Features
Low RMS Phase Jitter: <1 ps (typ)
High Stability: ±10, ±25, ±50 ppm
Wide Temperature Range
o
Industrial: -40° to 85° C
o
Ext. commercial: -20° to 70° C
High Supply Noise Rejection: -50 dBc
Two Independent LVDS Outputs
Pin-Selectable Configurations
o
3-bit Output Frequency Combinations
Short Lead Times: 2 Weeks
Wide Freq. Range:
o
LVDS output: 2.3 – 460 MHz
Miniature Footprint of 3.2x2.5mm
Excellent Shock & Vibration Immunity
o
Qualified to MIL-STD-883
High Reliability
o
20x better MTF than quartz oscillators
Block Diagram
Supply Range of 2.25 to 3.6 V
Lead Free & RoHS Compliant
Applications
Storage Area Networks
o
SATA, SAS, Fibre Channel
Passive Optical Networks
o
EPON, 10G-EPON, GPON, 10G-PON
Ethernet
o
1G, 10GBASE-T/KR/LR/SR, and FCoE
HD/SD/SDI Video & Surveillance
PCI Express
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DSC2033
Page 1
MK-Q-B-P-D-12042609-2
DSC2033
Low-Jitter Configurable Dual LVDS Oscillator
Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Pin Name
Enable
NC
NC
GND
FS0
FS1
FS2
Output1+
Output1-
Output 2-
Output 2+
VDD2
VDD
NC
Pin Type
I
NA
NA
Power
I
I
I
O
O
O
O
Power
Power
NA
Description
Enables outputs when high and disables when low
Leave unconnected or grounded
Leave unconnected or grounded
Ground
Least significant bit for frequency selection
Middle bit for frequency selection
Most significant bit for frequency selection
Positive LVDS Output 1
Negative LVDS Output 1
Negative LVDS Output 2
Positive LVDS Output 2
Power Supply 2 for LVDS Output 2
Power Supply
Leave unconnected or grounded
Operational Description
The DSC2033 is a dual output LVDS oscillator
consisting of a MEMS resonator and a support
PLL IC.
The two outputs are generated
through independent 8-bit programmable
dividers from the output of the internal PLL.
Two constraints are imposed on the output
frequencies: 1) f
2
=M x f
1
/N, where M and N
are even integers between 4 and 254, 2)
1.2GHz < N x f
2
< 1.7GHz.
The actual frequencies output by the DSC2033
are controlled by an internal pre-programmed
memory (OTP).
This memory stores all
coefficients required by the PLL for up to eight
different frequency combinations.
Three
control pins (FS0 – FS2) select the output
frequency combination.
Discera supports
customer defined versions of the DSC2033.
Standard frequency options are described in in
the following sections.
When Enable (pin 1) is floated or connected to
VDD, the DSC2033 is in operational mode.
Driving Enable to ground will tri-state both
output drivers (hi-impedance mode).
Output Clock Frequencies
Table 1 lists the standard frequency configurations and the associated ordering information to be
used in conjunction with the ordering code above. Customer defined combinations are available.
Table 1. Pre-programmed pin-selectable output frequency combinations
Ordering
Info
G0001
G0002
GXXXX
Freq
(MHz)
f
OUT1
f
OUT2
f
OUT1
f
OUT1
f
OUT1
f
OUT2
Freq Select Bits [FS2, FS1, FS0] –
Default is [111]
000
148.5
74.25
100
100
001
156.25
125
125
125
010
150
125
0
0
011
125
25
0
0
100
125
50
0
0
101
100
50
0
0
110
100
75
0
0
111
400
200
0
0
Contact factory for additional configurations.
Frequency select bit are weakly tied high so if left unconnected the default setting will be [1] and
the device will output the associated frequency highlighted in
Bold.
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DSC2033
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MK-Q-B-P-D-12042609-2
DSC2033
Low-Jitter Configurable Dual LVDS Oscillator
Absolute Maximum Ratings
Item
Supply Voltage
Input Voltage
Junction Temp
Storage Temp
Soldering Temp
ESD
HBM
MM
CDM
Ordering Code
Condition
Temp Range
E: -20 to 70
I: -40 to 85
Packing
T: Tape & Reel
: Tube
Min
-0.3
-0.3
-
-55
-
-
Max
+4.0
V
DD
+0.3
+150
+150
+260
4000
400
1500
Unit
V
V
°C
°C
°C
V
DSC2033
40sec max.
F I 2
-
xxxxx
T
Freq (MHz)
See Freq. table
Package
F: 3.2x2.5mm
Stability
1: ±50ppm
2: ±25ppm
5: ±10ppm
Note: 1000+ years of data retention on internal memory
Specifications
Parameter
Supply Voltage
1
Supply Current
Supply Current
2
Frequency Stability
Aging
Startup Time
3
Input Logic Levels
Input logic high
Input logic low
Output Disable Time
4
Output Enable Time
Pull-Up Resistor
2
Output Offset Voltage
Delta Offset Voltage
(Unless specified otherwise: T=25° C)
Condition
V
DD
I
DD
I
DD
Δf
Δf
t
SU
V
IH
V
IL
t
DA
t
EN
Pull-up exists on all digital IO
40
1.125
350
200
2.3
48
2.5
0.28
0.4
1.7
350
460
52
1.4
50
Single-Ended
t
R
t
F
f
0
SYM
J
PER
J
CC
20% to 80%
R
L
=100Ω, C
L
= 2pF (to GND)
Single Frequency
Differential
F
O1
=F
O2
=156.25 MHz
200kHz to 20MHz @156.25MHz
100kHz to 20MHz @156.25MHz
12kHz to 20MHz @156.25MHz
EN pin low – outputs are disabled
EN pin high – outputs are enabled
R
L
=100Ω, F
O1
=F
O2
=156.25 MHz
Includes frequency variations due
to initial tolerance, temp. and
power supply voltage
1 year @25°C
T=25°C
0.75xV
DD
-
Min.
2.25
Typ.
21
38
Max.
3.6
23
Unit
V
mA
mA
±10
±25
±50
±5
5
-
0.25xV
DD
5
20
ppm
ppm
ms
V
ns
ns
kΩ
V
mV
mV
ps
MHz
%
ps
RMS
ps
RMS
LVDS Outputs
R=100Ω Differential
Pk to Pk Output Swing
Output Transition time
4
Rise Time
Fall Time
Frequency
Output Duty Cycle
Period Jitter
5
Integrated Phase Noise
Notes:
1.
2.
3.
4.
5.
2
Pin 4 V
DD
should be filtered with 0.01uf capacitor.
Output is enabled if Enable pad is floated or not connected.
t
su
is time to 100PPM stable output frequency after V
DD
is applied and outputs are enabled.
Output Waveform and Test Circuit figures below define the parameters.
Period Jitter includes crosstalk from adjacent output.
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DSC2033
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MK-Q-B-P-D-12042609-2
DSC2033
Low-Jitter Configurable Dual LVDS Oscillator
Nominal Performance Parameters
(Unless specified otherwise: T=25° C, V
DD
=3.3 V)
2.5
156MHz-LVDS
Phase Jitter (ps RMS)
2.0
212MHz-LVDS
320MHz-LVDS
1.5
410MHz-LVDS
1.0
0.5
0.0
0
200
400
600
800
1000
Low-end of integration BW: x kHz to 20 MHz
LVDS Phase jitter (integrated phase noise)
Output Waveform: LVDS
t
R
t
F
Output
Output
80
%
50%
20%
350 mV
830 mv
1/
f
o
t
EN
t
DA
V
IH
Enable
V
IL
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DSC2033
Page 4
MK-Q-B-P-D-12042609-2
DSC2033
Low-Jitter Configurable Dual LVDS Oscillator
Solder Reflow Profile
cM
ax
260
°
C
.
20-40
Sec
217
°
C
200
°
C
ax
.
60-150
Sec
150
°
C
3C
/Se
60-180
Sec
cM
Reflow
Pre heat
8 min max
Cool
Time
25
°
C
MSL 1 @ 260°C refer to JSTD-020C
Ramp-Up Rate (200°C to Peak Temp) 3°C/Sec Max.
Preheat Time 150°C to 200°C
60-180 Sec
Time maintained above 217°C
60-150 Sec
255-260°C
Peak Temperature
Time within 5°C of actual Peak
20-40 Sec
6°C/Sec Max.
Ramp-Down Rate
Time 25°C to Peak Temperature
8 min Max.
Temperature (°C)
3C
/
Se
e
/ e
/Se
6C/
cM
x
x
a x.
Package Dimensions
3.2 x 2.5 mm 14 Lead Plastic Package
Disclaimer:
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information
is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and
descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted
by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims
any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose,
merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the
body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or
sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any
damages resulting from such use or sale.
MICREL, Inc.
Phone: +1 (408) 944-0800
●
●
2180 Fortune Drive,
Fax: +1 (408) 474-1000
San Jose, California
95131
● Email: hbwhelp@micrel.com
●
●
USA
www.micrel.com
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DSC2033
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MK-Q-B-P-D-12042609-2
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