CS5155
CS5155
CPU 5-Bit Synchronous Buck Controller
Description
The CS5155 is a 5-bit synchronous
dual N-Channel buck controller. It
is designed to provide unprece-
dented transient response for
todayÕs demanding high-density,
high-speed logic. The regulator
operates using a proprietary control
method, which allows a 100ns
response time to load transients.
The CS5155 is designed to operate
over a 4.25-14V range (V
CC
) using
12V to power the IC and 5V as the
main supply for conversion.
The CS5155 is specifically designed
to power Pentium
¨
II processors
and other high performance core
logic. It includes the following fea-
tures: on board, 5-bit DAC, short
circuit protection, 1.0% output tol-
erance, V
CC
monitor, and pro-
grammable soft start capability. The
CS5155 is backwards compatible
with the 4 bit CS-5150, allowing the
mother board designer the capabili-
ty of using either the CS-5150 or the
CS5155 with no change in layout.
The CS5155 is available in 16 pin
surface mount and DIP packages.
Features
s
Dual N-Channel Design
s
Excess of 1MHz Operation
s
100ns Transient Response
s
5-Bit DAC
s
Backward Compatible with
4 Bit CS-5150/5151 and
Adjustable CS-5120/5121
s
30ns Gate Rise/Fall Times
s
1% DAC Accuracy
s
5V & 12V Operation
s
Remote Sense
s
Programmable Soft Start
s
Lossless Short Circuit
Protection
Application Diagram
Switching Power Supply for core logic - Pentium
¨
II processor
12V
5V
s
V
CC
Monitor
s
25ns FET Nonoverlap Time
s
Adaptive Voltage
Positioning
s
V
2
ª Control Topology
s
Current Sharing
s
Overvoltage Protection
2mH
1.3V to 3.5V @ 13A
0.1mF
1200mF/16V x 3
AlEl
IRL3103
V
CC1
V
CC2
V
ID0
V
ID1
V
ID2
V
ID3
V
ID4
330pF
SS
0.1mF
0.33mF
COMP
LGnd
V
ID0
V
ID1
V
ID2
V
ID3
V
ID4
C
OFF
V
GATE(H)
Package Options
CS5155
V
GATE(L)
IRL3103
1200mF/16V x 5
AlEl
PGnd
V
FB
V
FFB
3.3k
16 Lead SO Narrow & PDIP
V
ID0
V
ID1
V
ID2
V
ID3
SS
V
ID4
C
OFF
V
FFB
1
V
FB
COMP
LGnd
V
CC1
V
GATE(L)
PGnd
V
GATE(H)
V
CC2
100pF
V
2
is a trademark of Switch Power, Inc.
Pentium is a registered trademark of Intel Corporation.
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
Rev. 1/22/99
1
A
¨
Company
CS5155
Absolute Maximum Ratings
Pin Name
Max Operating Voltage
Max Current
V
CC1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16V/-0.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25mA DC/1.5A peak
V
CC2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/-0.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20mA DC/1.5A peak
SS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V/-0.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-100µA
COMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V/-0.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200µA
V
FB
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V/-0.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.2µA
C
OFF
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V/-0.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.2µA
V
FFB
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V/-0.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.2µA
V
ID0
- V
ID4
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V/-0.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-50µA
V
GATE(H)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/-0.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100mA DC/1.5A peak
V
GATE(L)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16V/-0.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100mA DC/1.5A peak
LGnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25mA
PGnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100mA DC/1.5A peak
Operating Junction Temperature, T
J
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0¡ to 150¡C
Lead Temperature Soldering
Wave Solder (through hole styles only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 sec. max, 260¡C peak
Reflow (SMD styles only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 sec. max above 183¡C, 230¡C peak
Storage Temperature Range, T
S
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65¡ to 150¡C
ESD Susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV
Electrical Characteristics: 0¡C < T
A
< +70¡C; 0¡C < T
J
< +85¡C; 8V < V
CC1
< 14V; 5V < V
CC2
< 20V;
DAC Code: V
ID4
= V
ID2
= V
ID1
= V
ID0
= 1; V
ID3
= 0; CV
GATE(L)
and CV
GATE(H)
= 1nF; C
OFF
= 330pF; C
SS
= 0.1µF, unless otherwise specified.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
s
Error Amplifier
V
FB
Bias Current
Open Loop Gain
Unity Gain Bandwidth
COMP SINK Current
COMP SOURCE Current
COMP CLAMP Current
COMP High Voltage
COMP Low Voltage
PSRR
V
FB
= 0V
1.25V < V
COMP
< 4V; Note 1
Note 1
V
COMP
= 1.5V; V
FB
= 3V; V
SS
> 2V
V
COMP
= 1.2V; V
FB
= 2.7V; V
SS
= 5V
V
COMP
= 0V; V
FB
= 2.7V
V
FB
= 2.7V; V
SS
= 5V
V
FB
=3V
8V < V
CC1
< 14V @ 1kHz; Note 1
50
500
0.4
30
0.4
4.0
60
0.3
60
3000
2.5
50
1.0
4.3
160
85
1.0
8.0
70
1.6
5.0
300
µA
dB
kH
mA
µA
mA
V
mV
dB
s
V
CC1
Monitor
Start Threshold
Stop Threshold
Hysteresis
s
DAC
Input Threshold
Input Pull Up Resistance
Pull Up Voltage
Accuracy
V
ID4
V
ID3
V
ID2
V
ID1
V
ID0
0
1
1
1
1
0
1
1
1
0
0
1
1
0
1
0
1
1
0
0
Output switching
Output not switching
Start-Stop
3.75
3.70
3.90
3.85
50
4.05
4.00
V
V
mV
V
ID0
, V
ID1
, V
ID2
, V
ID3
, V
ID4
V
ID0
, V
ID1
, V
ID2
, V
ID3
, V
ID4
Measure V
FB
= V
COMP
, 25¡C ² T
J
² 85¡C
1.00
25
4.85
1.25
50
5.00
2.40
100
5.15
1.0
1.3534
1.4039
1.4544
1.5049
V
k½
V
%
V
V
V
V
1.3266
1.3761
1.4256
1.4751
2
1.3400
1.3900
1.4400
1.4900
CS5155
Electrical Characteristics: 0¡C < T
A
< +70¡C; 0¡C < T
J
< +85¡C; 8V < V
CC1
< 14V; 5V < V
CC2
< 20V;
DAC Code: V
ID4
= V
ID2
= V
ID1
= V
ID0
= 1; V
ID3
= 0; CV
GATE(L)
and CV
GATE(H)
= 1nF; C
OFF
= 330pF; C
SS
= 0.1µF, unless otherwise specified.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
s
DAC: continued
V
ID4
V
ID3
V
ID2
V
ID1
V
ID0
0
1
0
1
1
0
1
0
1
0
0
1
0
0
1
0
1
0
0
0
0
0
1
1
1
0
0
1
1
0
0
0
1
0
1
0
0
1
0
0
0
0
0
1
1
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
1
1
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
0
1
1
0
0
1
1
1
0
0
0
1
0
1
1
1
1
0
1
1
0
1
0
1
0
1
1
0
1
0
0
1
0
0
1
1
1
0
0
1
0
1
0
0
0
1
1
0
0
0
0
s
V
GATE(H)
and V
GATE(L)
Out SOURCE Sat at 100mA
Out SINK Sat at 100mA
Out Rise Time
Out Fall Time
Shoot-Through Current
Delay V
GATE(H)
to V
GATE(L)
Delay V
GATE(L)
to V
GATE(H)
V
GATE(H)
, V
GATE(L)
Resistance
V
GATE(H)
, V
GATE(L)
Schottky
1.5246
1.5741
1.6236
1.6731
1.7226
1.7721
1.8216
1.8711
1.9206
1.9701
2.0196
2.0691
1.2315
2.1186
2.2176
2.3166
2.4156
2.5146
2.6136
2.7126
2.8116
2.9106
3.0096
3.1086
3.2076
3.3066
3.4056
3.5046
1.5400
1.5900
1.6400
1.6900
1.7400
1.7900
1.8400
1.8900
1.9400
1.9900
2.0400
2.0900
1.2440
2.1400
2.2400
2.3400
2.4400
2.5400
2.6400
2.7400
2.8400
2.9400
3.0400
3.1400
3.2400
3.3400
3.4400
3.5400
1.5554
1.6059
1.6564
1.7069
1.7574
1.8079
1.8584
1.9089
1.9594
2.0099
2.0604
2.1109
1.2564
2.1614
2.2624
2.3634
2.4644
2.5654
2.6664
2.7674
2.8684
2.9694
3.0704
3.1714
3.2724
3.3734
3.4744
3.5754
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Measure V
CC1
Ð V
GATE(L),
;V
CC2
Ð V
GATE(H)
Measure V
GATE(H)
Ð VPGnd;
V
GATE(L)
Ð VPGnd
1V < V
GATE(H)
< 9V; 1V < V
GATE(L)
< 9V
V
CC1
= V
CC2
= 12V
9V > V
GATE(H)
> 1V; 9V > V
GATE(L)
> 1V
V
CC1
= V
CC2
= 12V
Note 1
V
GATE(H)
falling to 2V; V
CC1
= V
CC2
= 8V
V
GATE(L)
rising to 2V
V
GATE(L)
falling to 2V; V
CC1
= V
CC2
= 8V
V
GATE(H)
rising to 2V
Resistor to LGnd
20
LGnd to V
GATE(H)
@ 10mA
LGnd to V
GATE(L)
@ 10mA
1.2
1.0
30
30
2.0
1.5
50
50
50
50
50
100
800
V
V
ns
ns
mA
ns
ns
k½
mV
25
25
50
600
3
CS5155
Electrical Characteristics: 0¡C < T
A
< +70¡C; 0¡C < T
J
< +85¡C; 8V < V
CC1
< 14V; 5V < V
CC2
< 20V;
DAC Code: V
ID4
= V
ID2
= V
ID1
= V
ID0
= 1; V
ID3
= 0; CV
GATE(L)
and CV
GATE(H)
= 1nF; C
OFF
= 330pF; C
SS
= 0.1µF, unless otherwise specified.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
s
Soft Start (SS)
Charge Time
Pulse Period
Duty Cycle
COMP Clamp Voltage
V
FFB
SS Fault Disable
High Threshold
s
PWM Comparator
Transient Response
V
FFB
Bias Current
s
Supply Current
I
CC1
I
CC2
Operating I
CC1
Operating I
CC2
s
C
OFF
Normal Charge Time
Extension Charge Time
Discharge Current
s
Time Out Timer
Time Out Time
Fault Mode Duty Cycle
(Charge Time/Pulse Period)
´
100
V
FB
= 0V; V
SS
= 0
V
GATE(H)
= Low; V
GATE(L)
= Low
1.6
25
1.0
0.50
0.9
3.3
100
3.3
0.95
1.0
2.5
5.0
200
6.0
1.10
1.1
3.0
ms
ms
%
V
V
V
V
FFB
= 0 to 5V to V
GATE(H)
= 9V to 1V;
V
CC1
= V
CC2
= 12V
V
FFB
= 0V
100
0.3
125
ns
µA
No Switching
No Switching
V
FB
= COMP = V
FFB
V
FB
= COMP = V
FFB
8.5
1.6
8
2
13.5
3.0
13
5
mA
mA
mA
mA
V
FFB
= 1.5V; V
SS
= 5V
V
SS
= V
FFB
= 0
C
OFF
to 5V; V
FB
>1V
1.0
5.0
5.0
1.6
8.0
2.2
11.0
µs
µs
mA
V
FB
= V
COMP
; V
FFB
= 2V;
Record V
GATE(H)
Pulse High Duration
V
FFB
= 0V
10
35
30
50
50
65
µs
%
Note 1: Guaranteed by design, not 100% tested in production.
Package Pin Description
PACKAGE PIN #
PIN SYMBOL
FUNCTION
16L SO Narrow & PDIP
1,2,3,4,6
V
ID0
Ð V
ID4
Voltage ID DAC input pins. These pins are internally pulled up to 5V
providing logic ones if left open. V
ID4
selects the DAC range. When V
ID4
is High (logic one), the DAC range is 2.14V to 3.54V with 100mV incre-
ments. When V
ID4
is Low (logic zero), the DAC range is 1.34V to 2.09V
with 50mV increments. V
ID0
- V
ID4
select the desired DAC output volt-
age. Leaving all 5 DAC input pins open results in a DAC output voltage
of 1.244V, allowing for adjustable output voltage, using a traditional
resistor divider.
Soft Start Pin. A capacitor from this pin to LGnd in conjunction with
internal 60µA current source provides soft start function for the con-
troller. This pin disables fault detect function during Soft Start. When a
fault is detected, the soft start capacitor is slowly discharged by internal
2µA current source setting the time out before trying to restart the IC.
Charge/discharge current ratio of 30 sets the duty cycle for the IC when
the regulator output is shorted.
5
SS
4
CS5155
Package Pin Description: continued
PACKAGE PIN #
PIN SYMBOL
FUNCTION
16L SO Narrow & PDIP
7
8
9
10
C
OFF
V
FFB
V
CC2
V
GATE(H)
A capacitor from this pin to ground sets the time duration for the on
board one shot, which is used for the constant off time architecture.
Fast feedback connection to the PWM comparator. This pin is connect-
ed to the regulator output. The inner feedback loop terminates on time.
Boosted power for the high side gate driver.
High FET driver pin capable of 1.5A peak switching current. Internal
circuit prevents V
GATE(H)
and V
GATE(L)
from being in high state simul-
taneously.
High current ground for the IC. The MOSFET drivers are referenced to
this pin. Input capacitor ground and the source of lower FET should be
tied to this pin.
Low FET driver pin capable of 1.5A peak switching current.
Input power for the IC and low side gate driver.
Signal ground for the IC. All control circuits are referenced to this pin.
Error amplifier compensation pin. A capacitor to ground should be
provided externally to compensate the amplifier.
Error amplifier DC feedback input. This is the master voltage feedback
which sets the output voltage. This pin can be connected directly to the
output or a remote sense trace.
Block Diagram
11
PGnd
12
13
14
15
16
V
GATE(L)
V
CC1
LGnd
COMP
V
FB
V
CC2
V
CC1
-
+
3.90V
3.85V
V
CC1
Monitor
Comparator
5V
-
60mA
0.7V
+
SS Low
Comparator
R
S
Q
Q
V
GATE(H)
FAULT
FAULT
PGnd
SS
2mA
+
-
SS High
Comparator
FAULT
Latch
V
CC1
V
ID0
V
ID1
V
ID2
V
ID3
V
ID4
5 BIT
DAC
+
-
PWM
Comparator
-
Slow Feedback
+
Error
Amplifier
2.5V
V
GATE(L)
PGnd
V
FB
COMP
V
FFB
Maximum
On-Time
Timeout
Normal
Off-Time
Timeout
R
S
Q
Q
PWM
Latch
GATE(H) = ON
GATE(H) = OFF
C
OFF
One Shot
R
S
Q
Fast Feedback
-
+
Extended
Off-Time
Timeout
V
FFB
Low
Comparator
Off-Time
Timeout
C
OFF
LGnd
1V
PWM
COMP
Time Out
Timer
(30ms)
Edge Triggered
5
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