Tips on XILINX FPGA design 1. Use a global clock buffer BUFG for the clock signal 2. Try to use only one clock edge to register data 3. Do not generate clocks internally except for the clocks generate...
front:Reverse:Current progress:
1. Minimum system operation
2. LED work
3. Key work
4. The USB to serial port driver is normal and the serial port works normallyThe pictures will be posted later, plea...
The innovative design of Stellaris that I want to share with netizens today is a bicycle ABS brake system. I hope you will like it.After TI acquired Luminary in 2009, it held another Stellaris Innovat...
It's been a while since I got the board, so I'll get familiar with the environment when I have some free time. Let's see how to use AS. I won't talk about the installation, it's quite big, but MDK or ...
MAX32630 comes with its own I2C protocol and can directly call the corresponding library function. We know that the typical I2C protocol of the STM32F4 library function uses the output high and low le...
Ubuntu 12.04, because the computer is Intel integrated graphics, which is open source, so there is no need to install graphics card drivers. But after installation, the monitor resolution cannot be ad...
Recently, the U.S. Department of Commerce announced that it would prohibit companies in the country from selling any electronic technology or communication components to ZTE, a Chinese communicatio...[Details]
"Originally, there are many people who can design very good
chips
, but the market does not give domestic
chips
the opportunity to iterate, and domestic companies cannot give engine...[Details]
1. Test conditions Hardware: STM32L432KC Main frequency: 80MHz Compiler: IAR 8.20.1 Compiler options: High Speed no size constraints CRC generator polynomial: 0x782f 2. Test Method The softwar...[Details]
The update interrupt initialization configuration of the stm32 advanced timer TIM1 is not much different from that of the ordinary timer. What needs to be paid attention to is the configuration of TI...[Details]
When the domestic discussion about "ZTE being banned" was hot, Alibaba officially announced the acquisition of chip supplier
Zhongtianwei
, but the investment amount was not disclosed. At t...[Details]
Chip: STM32F103C8T6 Application Pin: Output: PA0, PA1 TIM2 CH2 channel To achieve 50HZ (20ms) adjustable PWM output on the PA1 pin, set the system TIMx_CNT=8MHZ=8000 000HZ, set TIMx_PSC=800-1, then T...[Details]
Because the STM32 HAL library only has millisecond-level delay for HAl_Delay(), in order to achieve accurate microsecond-level delay, Systick has to be modified. However, since it is used internally ...[Details]
The goal of this article is to build a TCP client based on the previous project that can ping the PC, and can actively send data to the PC, and can also send and receive data with the PC, and display...[Details]
From last year to now, competition in the photovoltaic inverter industry has become increasingly fierce. In addition to the introduction of new products, various marketing and promotion methods hav...[Details]
Our photovoltaic power station starts working at 5:30 in the morning. When you are still sleeping, the inverter starts working to make money!
Some people are skeptical. The sun hasn't even...[Details]
The application of millimeter wave technology in mobile communications also involves a series of technical problems, including the large propagation loss of millimeter waves and the susceptibility ...[Details]
From concept proposal, prototype exploration, technology accumulation to product iteration and industrial development,
VR
has gradually expanded from the military market to the consumer market...[Details]
At the beginning of the new year of 2018, after the release of the national photovoltaic policy, we found that the state’s support for village-level poverty alleviation power stations has not weake...[Details]
The article is written for LPC2148, but it is also applicable to Samsung's 44B0 chip. You only need to select S3C44B0 as the corresponding CPU when selecting it. JLINK debugging experience un...[Details]
FPGA/CPLD
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