CS4382A
114 dB, 192 kHz 8-Channel D/A Converter
Features
Advanced Multi-bit Delta Sigma Architecture
24-bit Conversion
Up to 192 kHz Sample Rates
114 dB Dynamic Range
-100 dB THD+N
Direct Stream Digital
®
(DSD
™
) Mode
On-chip 50 kHz Filter
Matched PCM and DSD Analog Output Levels
Selectable Digital Filters
Volume Control with 1 dB Step Size and Soft
Ramp
Low Clock-jitter Sensitivity
+5 V Analog Supply, +2.5 V Digital Supply
Separate 1.8 to 5 V Logic Supplies for the
Control & Serial Ports
C o n tro l & S erial A u d io P o rt
S u p p lies = 1.8 V to 5 V
Description
The CS4382A is a complete 8-channel digital-to-analog
system. This D/A system includes digital de-emphasis,
1 dB step size volume control, ATAPI channel mixing,
selectable fast and slow digital interpolation filters fol-
lowed by an oversampled, multi-bit delta-sigma
modulator which includes mismatch shaping technolo-
gy that eliminates distortion due to capacitor mismatch.
Following this stage is a multi-element switched capac-
itor stage and low-pass filter with differential analog
outputs.
The CS4382A also has a proprietary DSD processor
which allows for 50 kHz on-chip filtering without an in-
termediate decimation stage. The CS4382A is available
in a 48-pin LQFP package in both Commercial (-40°C to
+85°C) and Automotive grades (-40°C to +105°C). The
CDB4382A Customer Demonstration board is also
available for device evaluation and implementation sug-
gestions. Please see
“Ordering Information” on page 48
for complete details.
The CS4382A accepts PCM data at sample rates from
4 kHz to 216 kHz, DSD audio data, and delivers excel-
lent sound quality. These features are ideal for multi-
channel audio systems including SACD players, A/V re-
ceivers, digital TV’s, mixing consoles, effects
processors, sound cards, and automotive audio
systems.
D ig ital S u p p ly = 2.5 V
A n alo g S u p p ly = 5 V
Le ve l T ra nsla tor
H ard w are Mo d e o r
I
2
C /S P I S o ftw are Mo d e
C o n tro l D ata
R e giste r/H a rdwa re
C onfigura tion
Inte rna l V olta ge
R e fe re nce
R es et
P C M S erial
A u d io In p u t
Le ve l T ra nsla tor
S e ria l Inte rfa ce
8
V olume
C ontrols
D igita l
F ilte rs
Multi-bit
∆Σ
Modula tors
S witch-C a p
D A C a nd
A na log F ilte rs
8
8
D ifferen tial
O u tp u ts
D S D A u d io
In p u t
D S D P roce ssor
-50 kH z filte r
E xte rna l Mute
C ontrol
2
Mu te S ig n als
http://www.cirrus.com
Copyright
©
Cirrus Logic, Inc. 2008
(All Rights Reserved)
MAY '08
DS618F1
CS4382A
TABLE OF CONTENTS
1. PIN DESCRIPTION ................................................................................................................................. 6
2. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 8
RECOMMENDED OPERATING CONDITIONS .................................................................................... 8
ABSOLUTE MAXIMUM RATINGS ........................................................................................................ 8
DAC ANALOG CHARACTERISTICS - COMMERCIAL (-CQZ) ............................................................. 9
DAC ANALOG CHARACTERISTICS - AUTOMOTIVE (-DQZ) ........................................................... 10
POWER AND THERMAL CHARACTERISTICS .................................................................................. 11
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ...................................... 12
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ...................................... 13
DSD COMBINED DIGITAL & ON-CHIP ANALOG FILTER RESPONSE ............................................ 13
DIGITAL CHARACTERISTICS ............................................................................................................ 14
SWITCHING CHARACTERISTICS - PCM .......................................................................................... 15
SWITCHING CHARACTERISTICS - DSD ........................................................................................... 16
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT ............................................. 17
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT ............................................ 18
3. TYPICAL CONNECTION DIAGRAM .................................................................................................. 19
4. APPLICATIONS ................................................................................................................................... 21
4.1 Master Clock .................................................................................................................................. 21
4.2 Mode Select ................................................................................................................................... 21
4.3 Digital Interface Formats ................................................................................................................ 23
4.4 Oversampling Modes ..................................................................................................................... 24
4.5 Interpolation Filter .......................................................................................................................... 24
4.6 De-emphasis .................................................................................................................................. 24
4.7 ATAPI Specification ....................................................................................................................... 25
4.8 Direct Stream Digital (DSD) Mode ................................................................................................. 26
4.9 Grounding and Power Supply Arrangements ................................................................................ 26
4.9.1 Capacitor Placement ............................................................................................................. 26
4.10 Analog Output and Filtering ......................................................................................................... 26
4.11 Mute Control ................................................................................................................................ 27
4.12 Recommended Power-Up Sequence .......................................................................................... 28
4.12.1 Hardware Mode ................................................................................................................... 28
4.12.2 Software Mode .................................................................................................................... 28
4.13 Recommended Procedure for Switching Operational Modes ...................................................... 28
4.14 Control Port Interface ................................................................................................................... 28
4.14.1 MAP Auto Increment ........................................................................................................... 29
4.14.2 I²C Mode .............................................................................................................................. 29
4.14.2.1 I²C Write ................................................................................................................... 29
4.14.2.2 I²C Read .................................................................................................................. 29
4.14.3 SPI Mode ............................................................................................................................. 30
4.14.3.1 SPI Write .................................................................................................................. 30
4.15 Memory Address Pointer (MAP) ................................................................................................. 31
4.16 INCR (Auto Map Increment Enable) ............................................................................................ 31
4.16.1 MAP4-0 (Memory Address Pointer) .................................................................................... 31
5. REGISTER QUICK REFERENCE ........................................................................................................ 32
6. REGISTER DESCRIPTION .................................................................................................................. 33
6.1 Mode Control 1 (Address 01h) ....................................................................................................... 33
6.1.1 Control Port Enable (CPEN) .................................................................................................. 33
6.1.2 Freeze Controls (FREEZE) ................................................................................................... 33
6.1.3 Master Clock Divide Enable (MCLKDIV) ............................................................................... 33
6.1.4 DAC Pair Disable (DACx_DIS) .............................................................................................. 33
6.1.5 Power Down (PDN) ............................................................................................................... 34
6.2 Mode Control 2 (Address 02h) ....................................................................................................... 34
2
DS618F1
CS4382A
6.2.1 Digital Interface Format (DIF) ................................................................................................ 34
6.3 Mode Control 3 (Address 03h) ....................................................................................................... 35
6.3.1 Soft Ramp and Zero Cross Control (SZC) ............................................................................ 35
6.3.2 Single Volume Control (SNGLVOL) ...................................................................................... 36
6.3.3 Soft Volume Ramp-Up After Error (RMP_UP) ...................................................................... 36
6.3.4 Mutec Polarity (MUTEC+/-) ................................................................................................... 36
6.3.5 Auto-Mute (AMUTE) .............................................................................................................. 36
6.3.6 Mutec Pin Control (MUTEC) .................................................................................................. 37
6.4 Filter Control (Address 04h) ........................................................................................................... 37
6.4.1 Interpolation Filter Select (FILT_SEL) ................................................................................... 37
6.4.2 De-Emphasis Control (DEM) ................................................................................................. 37
6.4.3 Soft Ramp-Down Before Filter Mode Change (RMP_DN) .................................................... 37
6.5 Invert Control (Address 05h) .......................................................................................................... 38
6.5.1 Invert Signal Polarity (Inv_Xx) ............................................................................................... 38
6.6 Mixing Control Pair 1 (Channels A1 & B1)(Address 06h)
Mixing Control Pair 2 (Channels A2 & B2)(Address 09h)
Mixing Control Pair 3 (Channels A3 & B3)(Address 0Ch)
Mixing Control Pair 4 (Channels A4 & B4)(Address 0Fh) .................................................................... 38
6.6.1 Channel A Volume = Channel B Volume (A=B) .................................................................... 38
6.6.2 ATAPI Channel Mixing and Muting (ATAPI) .......................................................................... 39
6.6.3 Functional Mode (FM) ........................................................................................................... 40
6.7 Volume Control (Addresses 07h, 08h, 0Ah, 0Bh, 0Dh, 0Eh) ........................................................ 40
6.7.1 Mute (MUTE) ......................................................................................................................... 40
6.7.2 Volume Control (XX_VOL) .................................................................................................... 41
6.8 Chip Revision (Address 12h) ......................................................................................................... 41
6.8.1 Part Number ID (PART) [Read Only] .................................................................................... 41
6.8.2 Revision ID (REV) [Read Only] ............................................................................................. 41
7. FILTER PLOTS ..................................................................................................................................... 42
8. PARAMETER DEFINITIONS ................................................................................................................ 46
9. PACKAGE DIMENSIONS .................................................................................................................... 47
10. ORDERING INFORMATION .............................................................................................................. 48
11. REFERENCES .................................................................................................................................... 48
12. REVISION HISTORY .......................................................................................................................... 49
DS618F1
3
CS4382A
LIST OF FIGURES
Figure 1.Serial Audio Interface Timing ...................................................................................................... 15
Figure 2.Direct Stream Digital - Serial Audio Input Timing ........................................................................ 16
Figure 3.Control Port Timing - I²C Format ................................................................................................. 17
Figure 4.Control Port Timing - SPI Format ................................................................................................ 18
Figure 5.Typical Connection Diagram, Software Mode ............................................................................. 19
Figure 6.Typical Connection Diagram, Hardware Mode ........................................................................... 20
Figure 7.Format 0 - Left-Justified up to 24-bit Data .................................................................................. 23
Figure 8.Format 1 - I²S up to 24-bit Data .................................................................................................. 23
Figure 9.Format 2 - Right-Justified 16-bit Data ......................................................................................... 23
Figure 10.Format 3 - Right-Justified 24-bit Data ....................................................................................... 23
Figure 11.Format 4 - Right-Justified 20-bit Data ....................................................................................... 24
Figure 12.Format 5 - Right-Justified 18-bit Data ....................................................................................... 24
Figure 13.De-Emphasis Curve .................................................................................................................. 25
Figure 14.ATAPI Block Diagram (x = channel pair 1, 2, 3, or 4) ............................................................... 25
Figure 15.Full-Scale Output ...................................................................................................................... 27
Figure 16.Recommended Output Filter ..................................................................................................... 27
Figure 17.Control Port Timing, I²C Mode .................................................................................................. 30
Figure 18.Control Port Timing, SPI Mode ................................................................................................. 30
Figure 19.Single-Speed (fast) Stopband Rejection ................................................................................... 42
Figure 20.Single-Speed (fast) Transition Band ......................................................................................... 42
Figure 21.Single-Speed (fast) Transition Band (detail) ............................................................................. 42
Figure 22.Single-Speed (fast) Passband Ripple ....................................................................................... 42
Figure 23.Single-Speed (slow) Stopband Rejection ................................................................................. 42
Figure 24.Single-Speed (slow) Transition Band ........................................................................................ 42
Figure 25.Single-Speed (slow) Transition Band (detail) ............................................................................ 43
Figure 26.Single-Speed (slow) Passband Ripple ...................................................................................... 43
Figure 27.Double-Speed (fast) Stopband Rejection ................................................................................. 43
Figure 28.Double-Speed (fast) Transition Band ........................................................................................ 43
Figure 29.Double-Speed (fast) Transition Band (detail) ............................................................................ 43
Figure 30.Double-Speed (fast) Passband Ripple ...................................................................................... 43
Figure 31.Double-Speed (slow) Stopband Rejection ................................................................................ 44
Figure 32.Double-Speed (slow) Transition Band ...................................................................................... 44
Figure 33.Double-Speed (slow) Transition Band (detail) .......................................................................... 44
Figure 34.Double-Speed (slow) Passband Ripple .................................................................................... 44
Figure 35.Quad-Speed (fast) Stopband Rejection .................................................................................... 44
Figure 36.Quad-Speed (fast) Transition Band .......................................................................................... 44
Figure 37.Quad-Speed (fast) Transition Band (detail) .............................................................................. 45
Figure 38.Quad-Speed (fast) Passband Ripple ........................................................................................ 45
Figure 39.Quad-Speed (slow) Stopband Rejection ................................................................................... 45
Figure 40.Quad-Speed (slow) Transition Band ......................................................................................... 45
Figure 41.Quad-Speed (slow) Transition Band (detail) ............................................................................. 45
Figure 42.Quad-Speed (slow) Passband Ripple ....................................................................................... 45
4
DS618F1
CS4382A
LIST OF TABLES
Table 1. Common Clock Frequencies ....................................................................................................... 21
Table 2. Digital Interface Format, Stand-Alone Mode Options .................................................................. 22
Table 3. Mode Selection, Stand-Alone Mode Options .............................................................................. 22
Table 4. Direct Stream Digital (DSD), Stand-Alone Mode Options ........................................................... 22
Table 5. Digital Interface Formats - PCM Mode ........................................................................................ 34
Table 6. Digital Interface Formats - DSD Mode ........................................................................................ 35
Table 7. ATAPI Decode ............................................................................................................................ 39
Table 8. Example Digital Volume Settings ................................................................................................ 41
DS618F1
5
Microcontroller MCU
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