CXA2040Q
I
2
C Bus-Compatible Video Switch
Description
The CXA2040Q is an I
2
C bus-compatible 5-input,
3-output video switch for TVs.
Features
•
Serial data control via I
2
C bus
•
5 composite video input systems
•
2 Y/C (S terminal) input systems
•
3 composite video output systems
•
1 Y/C (S terminal) output system
•
Input can be selected independently for each
output system.
•
SYNC_ID function for CV1 system input
•
Built-in 6dB amplifier for CVOUT2 system output
•
Built-in Y/C MIX circuit
•
Slave address can be changed (90H/92H).
•
High impedance maintained by I
2
C bus line (SDA,
SCL) even when power is OFF.
Applications
TVs
Pin Configuration
(Top View)
SYNCTC
SDA
CV1
32 pin QFP (Plastic)
Absolute Maximum Ratings
(Ta = 25°C)
•
Supply voltage
V
CC
12
V
•
Operating temperature
Topr –20 to +75 °C
•
Storage temperature
Tstg –65 to +150 °C
•
Allowable power dissipation P
D
1.0
W
(when mounted on a 50mm
×
50mm board)
Operating Conditions
Supply voltage
Structure
Bipolar silicon monolithic IC
ADR
CVOUT1
SCL
V
CC
9.0 ± 0.5
V
NC
24
23
22
21
20
19
18
NC
17
CV2 25
V
CC
26
CV3 27
NC 28
CV4 29
GND 30
CV5 31
BIAS 32
16 NC
15 CVOUT2
14 NC
13 CVOUT3
12 NC
11 YOUT
10 NC
9 COUT
1
2
3
4
5
6
7
8
C1
S1
S2
C2
Y1
Y2
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
NC
–1–
NC
E95Z44-ST
CXA2040Q
Block Diagram
GND
V
CC
SCL
ADR
SDA
19
S1
30
26
20
21
4
I
2
C BUS DECODER
SYNCTC 22
SYNC DETECT
CV1
CV2
CV1 23
CV1
CV3
CV4
CV5
CV6
SW1
17 CVOUT1
CV2 25
CV2
CV7
MUTE
CV3 27
CV3
CV1
CV2
CV3
CV4
6dB
SW2
15 CVOUT2
CV4 29
CV4
CV5
CV6
CV7
MUTE
CV5 31
CV5
CV1
CV2
Y1 1
CV6
CV3
CV4
CV5
CV6
C1 3
CV7
MUTE
SW3
13 CVOUT3
Y2 5
CV7
Y1
Y2
MUTE
SW4
11 YOUT
C2 7
C1
C2
MUTE
BIAS 32
BIAS
MUTE
SW5
9 COUT
∗
Numbers inside circles indicate the IC pin numbers.
–2–
S2
6
CXA2040Q
Pin Description
Pin
No.
Symbol
Pin voltage
Equivalent circuit
Description
V
CC
1
20k
147
×
2
28k
1
5
3
7
Y1
Y2
C1
C2
5
4.5V
3
7
Y/C separation signal inputs.
Biased to approximately 4.5V.
Input the input signals through
capacitors. Connect protective
resistor of 220Ω between these
pins and the capacitors.
Y1 and Y2 pins: Luminance
signals input.
C1 and C2 pins: Chrominance
signals input.
V
CC
4
6
S1
S2
50k
4
6
50k
100k
×
4
Applying a DC voltage to S1 and
S2 pins allows these voltages to
be applied to the microcomputer
as the I
2
C bus status register data.
S1, S2 = 0 to 2V
OPEN = 0, SEL = 1
S1, S2 = 4.75 to 7.25V
OPEN = 0, SEL = 0
S1, S2 = 9.5 to 12V
OPEN = 1, SEL = 0
V
CC
200
1.2k
11
9
YOUT
COUT
×
5
4.5V
×
2
×
2
11
9
×
6
Y/C signal outputs.
YOUT pin: Luminance signal
output.
COUT pin: Chrominance signal
output.
V
CC
200
1.2k
17
15
13
CVOUT1
CVOUT2
CVOUT3
4.5V
17
15
13
×
5
×
6
×
2
×
2
Composite video signal outputs.
CVOUT1, CVOUT2:
0dB output with respect to
the input signal.
CVOUT2:
+6dB output with respect
to the input signal.
–3–
CXA2040Q
Pin
No.
Symbol
Pin voltage
Equivalent circuit
Description
V
CC
19
19
ADR
72k
28k
Selects the slave address for the
I
2
C bus.
90H at 1.0V or less
92H at 3.5V or more
90H when open
V
CC
4k
20
SCL
—
20
×
4
I
2
C bus signal input.
Connect protective resistor of
220Ω between this pin and the
SCL line.
V
CC
4k
21
21
SDA
—
×
6
I
2
C bus signal input.
Connect protective resistor of
220Ω between this pin and the
SDA line.
V
CC
1.2k
147
147
22
SYNCTC
22
Sync tip clamp time constant for
Sync Separation.
Connect 68kΩ resistor between
this pin and V
CC
.
Connect 10µF capacitor between
this pin and GND.
1.2k
–4–
CXA2040Q
Pin
No.
Symbol
Pin voltage
Equivalent circuit
Description
V
CC
20k
23
CV1
4.5V
147
23
28k
Composite video signal input.
Biased to approximately 4.5V.
Input the input signal through
capacitor. Connect protective
resistor of 220Ω between this pin
and the capacitor.
The composite video signal input
to CV1 is also taken into the
"SYNC DETECT circuit" of which
SYNC is existed or not.
V
CC
20k
147
28k
25
27
29
31
CV2
CV3
CV4
CV5
25
4.5V
27
29
31
Composite video signal input.
Biased to approximately 4.5V.
Input the input signals through
capacitors. Connect protective
resistor of 220Ω between these
pins and the capacitors.
26
30
V
CC
GND
9.0V
∗
1
0.0V
∗
1
V
CC
1.2k
Power supply.
Apply 9.0V.
GND.
32
BIAS
4.5V
32
20k
22.5k
4.5V bias.
Attach a decoupling capacitor
between this pin and GND.
This pin cannot be used as an
external power supply.
2
8
10
12
14
16
18
24
28
NC
NC (not connected).
Connect to GND.
If these NC pins are not connected
to GND, the cross talk and other
desired values indicated in the
Electrical Characteristics cannot
be obtained.
∗
1
Applied externally.
–5–
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