LPC4327JET100,551 datasheet, PDF

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LPC4327JET100,551: DescriptionRISC Microcontroller, 32-Bit, FLASH, CMOS, PBGA100; CategoryThe embedded processor and controller Microcontrollers and processors; File Size3MB，162 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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LPC4327JET100,551 Overview

RISC Microcontroller, 32-Bit, FLASH, CMOS, PBGA100

LPC4327JET100,551 Parametric

Parameter Name	Attribute value
Objectid	8363011897
package instruction	9 X 9 MM, 0.70 MM HEIGHT, PLASTIC, SOT926-1, TFBGA-100
Reach Compliance Code	unknown
YTEOL	8.08
Has ADC	YES
Address bus width
bit size	32
maximum clock frequency	25 MHz
DAC channel	YES
DMA channel	YES
External data bus width
JESD-30 code	S-PBGA-B100
length	9 mm
Number of I/O lines	49
Number of terminals	100
PWM channel	NO
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Package shape	SQUARE
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
ROM programmability	FLASH
Maximum seat height	1.2 mm
speed	204 MHz
Maximum supply voltage	3.6 V
Minimum supply voltage	2.2 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
width	9 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC

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LPC435x/3x/2x/1x

32-bit ARM Cortex-M4/M0 MCU; up to 1 MB flash and 136 kB

SRAM; Ethernet, two High-speed USB, LCD, EMC

Rev. 5.3 — 15 March 2016

Product data sheet

1. General description

The LPC435X_3X_2X_1X are ARM Cortex-M4 based microcontrollers with Floating Point

Unit (FPU) for embedded applications which include an ARM Cortex-M0 coprocessor, up

to 1 MB of flash and 136 kB of on-chip SRAM, 16 kB of EEPROM memory, two

high-speed USB controllers, Ethernet, LCD, an external memory controller, a quad SPI

Flash Interface (SPIFI) that supports execute-in-place, advanced configurable peripherals

such as the State Configurable Timer (SCTimer/PWM) and the Serial General Purpose

I/O (SGPIO) interface, and multiple digital and analog peripherals. The

LPC435X_3X_2X_1X operate at CPU frequencies of up to 204 MHz.

The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power

consumption, enhanced debug features, and a high level of support block integration. The

ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with

separate local instruction and data buses as well as a third bus for peripherals, and

includes an internal prefetch unit that supports speculative branching. The ARM

Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A

hardware floating-point processor is integrated into the core.

The ARM Cortex-M0 coprocessor is an energy-efficient and easy-to-use 32-bit core,

which is upward code- and tool-compatible with the Cortex-M4 core. It is ideal for handling

control or peripheral handling to free up the Cortex-M4 for real-time processing. The

Cortex-M0 coprocessor offers up to 204 MHz performance with a simple instruction set

and reduced code size. In LPC43xx, the Cortex-M0 coprocessor hardware multiply is

implemented as a 32-cycle iterative multiplier.

For additional documentation related to the LPC43xx parts, see

Section 17.

2. Features and benefits



Cortex-M4 Processor core



ARM Cortex-M4 processor (version r0p1), running at frequencies of up to

204 MHz.



Built-in Memory Protection Unit (MPU) supporting eight regions.



Built-in Nested Vectored Interrupt Controller (NVIC).



Hardware floating-point unit.



Non-maskable Interrupt (NMI) input.



JTAG and Serial Wire Debug (SWD), serial trace, eight breakpoints, and four watch

points.



Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support.



System tick timer.

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