E2A0011-16-X1
¡ Semiconductor
MSM6927/6947
¡ Semiconductor
1200 bps Single Chip FSK MODEM
This version: Jan. 1998
MSM6927/6947
Previous version: Nov. 1996
GENERAL DESCRIPTION
The MSM6927 and the MSM6947 are OKI's 1200 bps single chip modem series which transmit
and receive serial, binary data over a switched telephone network using frequency shift
keying(FSK).
The MSM6927 is compatible with ITU-T V.23 series data sets, while the MSM6947 is compatible
with Bell 202 series data sets.
These devices provide all the necessary modulation, demodulation, and filtering required to
implement a serial, asynchronous communication link.
OKI's single chip modem series is designed for users who are not telecommunication experts and
are easy to use cost effective alternative to standard discrete modem design.
CMOS LSI technology provides the advantages of small size, low power, and increased
reliability.
The design of the integrated circuit assures compatibility with a broad base of installed low speed
modems and acoustic couplers. Applications include interactive terminals, desk top computers,
point of sale equipment, and credit verification systems.
FEATURES
• Compatible with ITU-T V.23 (MSM6927)
• Compatible with BELL 202 (MSM6947)
• CMOS silicon gate process
• Switched capacitor and advanced CMOS analog technology
• Data rate from 0 to 1200 bps
• Half duplex (2-Wire)
• Receive squelch delay
• Selectable built-in timers and external delay timers possible
• All filtering, modulation, demodulation, and DTE interface on chip
• Crystal controlled oscillator on chip
• TTL compatible digital interface
• Low power dissipation: 90 mW Typ.
• Package options:
28-pin plastic DIP
(DIP28-P-600–2.54)
(Product name: MSM6927RS)
(Product name: MSM6947RS)
44-pin plastic QFP
(QFP44-P-910-0.80–K)
(Product name: MSM6927GS-K)
(Product name: MSM6947GS-K)
(QFP44-P-910-0.80–2K) (Product name: MSM6927GS-2K)
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¡ Semiconductor
MSM6927/6947
PIN DESCRIPTIONS
Power
Pin No.
RS GS-K
15
19
24
26
19
23
33
35
Name
DG
AG
V
A
V
D
I/O
—
—
—
—
Description
Ground reference of V
D
(digital ground)
Ground reference of V
A
(digital ground)
Supply voltage (+12 V nominal)
Supply voltage (+5 V nominal)
Clocks
Pin No.
RS GS-K
1
2
3
41
42
43
Name
X1
X2
CLK
I/O
—
—
O
Description
Master clock timing is provided by either a series resonant crystal (3.579545 MHz
±0.01%) connected across X1 and X2, or by an external TTL/CMOS clock driving
X2 with AC coupling. In this latter case, X1 is left unconnected.
See Fig. 10.
873.9 Hz clock output. This clock is used to implement external delay circuits etc.
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