V53C16258HK25 datasheet, PDF - EEWORLD Datasheet

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V53C16258HK25: Descriptionhigh performance 256k X 16 edo page mode cmos dynamic ram optional self refresh; Categorystorage storage; File Size558KB，20 Pages; ManufacturerMosel Vitelic Corporation ( MVC ); Websitehttp://www.moselvitelic.com

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V53C16258HK25 Overview

high performance 256k X 16 edo page mode cmos dynamic ram optional self refresh

V53C16258HK25 Parametric

Parameter Name	Attribute value
Maker	Mosel Vitelic Corporation ( MVC )
Parts packaging code	SOJ
package instruction	SOJ, SOJ40,.44
Contacts	40
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	FAST PAGE WITH EDO
Maximum access time	25 ns
Other features	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
I/O type	COMMON
JESD-30 code	R-PDSO-J40
length	26.04 mm
memory density	4194304 bit
Memory IC Type	EDO DRAM
memory width	16
Number of functions	1
Number of ports	1
Number of terminals	40
word count	262144 words
character code	256000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256KX16
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	SOJ
Encapsulate equivalent code	SOJ40,.44
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
power supply	5 V
Certification status	Not Qualified
refresh cycle	512
Maximum seat height	3.66 mm
self refresh	NO
Maximum standby current	0.001 A
Maximum slew rate	0.26 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	DUAL
width	10.16 mm

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MOSEL VITELIC

V53C16258H

HIGH PERFORMANCE

256K X 16 EDO PAGE MODE

CMOS DYNAMIC RAM

OPTIONAL SELF REFRESH

25 ns

13 ns

10 ns

45 ns

PRELIMINARY

HIGH PERFORMANCE

Max. RAS Access Time, (t

RAC

)

Max. Column Address Access Time, (t

CAA

)

Min. Extended Data Out Mode Cycle Time, (t

)

Min. Read/Write Cycle Time, (t

)

30 ns

16 ns

12 ns

60 ns

35 ns

18 ns

14 ns

70 ns

40 ns

20 ns

15 ns

75 ns

45 ns

22 ns

17 ns

80 ns

50 ns

24 ns

19 ns

90 ns

Features

256K x 16-bit organization

EDO Page Mode for a sustained data rate of

100 MHz

RAS access time: 25, 30, 35, 40, 45, 50 ns

Dual CAS Inputs

Low power dissipation

Read-Modify-Write, RAS-Only Refresh,

CAS-Before-RAS Refresh

Optional Self Refresh (V53C16258SH)

Refresh Interval: 512 cycles/8 ms

Available in 40-pin 400 mil SOJ and 40/44L-pin

400 mil TSOP-II packages

Single +5V

±10%

Power Supply

TTL Interface

Description

The V53C16258H is a high speed 262,144 x 16

bit high performance CMOS dynamic random

access memory. The V53C16258H offers a

combination of unique features including: EDO

Page Mode operation for higher sustained

bandwidth with Page Mode cycle times as short as

10ns. All inputs are TTL compatible. Input and

output capicatance is significantly lowered to

increase performance and minimize loading. These

features make the V53C16258H ideally suited for a

wide variety of high performance computer systems

and peripheral applications.

Device Usage Chart

Operating

Temperature

Range

C to 70

–40

C to +85

Package Outline

•

Access Time (ns)

•

Power

Std.

•

Temperature

Mark

Blank

V53C16258H Rev. 3.8 November 1999

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