Storage Temperature Range ................ – 65°C to +150°C
Operating Temperature Range
C Device ................................................ 0°C to +70°C
I Device ............................................. – 25°C to +85°C
Lead Temperature (Soldering, 10 sec) ................. +300°C
*Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above
those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of
the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to Absolute
Maximum Rating Conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS:
V
DD
= +5V, V
SS
= – 5V, T
A
= +25°C, unless otherwise indicated.
Symbol
V
OS
TCV
OS
V
OS
/DT
I
BIAS
Parameter
Input Offset Voltage
Average Temperature Coefficient of
Input Offset Voltage
Offset Voltage vs Time
Input Bias Current
(CLK On)
Input Bias Current
(CLK Off)
Input Offset Current
Input Resistance
Large Signal Voltage Gain
Output Voltage Swing
(Note 2)
Common-Mode
Voltage Range
Common-Mode
Rejection Ratio
Power Supply
Rejection Ratio
Input Noise Voltage
Input Noise Current
Unity-Gain Bandwidth
Slew Rate
Overshoot
Operating Supply Range
Supply Current
Internal Chopping Frequency
Clamp ON Current (Note 3)
Clamp OFF Current (Note 3)
Test Conditions
T
A
= +25°C
0°C < T
A
< +70°C
0°C < T
A
< +70°C
Min
—
—
—
—
—
—
—
—
—
—
—
—
120
±4.7
—
– 4.3
120
120
—
—
—
—
—
—
5
—
100
25
—
Typ
±2
±10
0.01
150
30
100
250
15
35
100
25
10
12
150
±4.85
±4.95
—
140
140
0.2
0.7
0.01
0.4
1
15
—
1
275
100
1
Max
±5
—
0.05
—
100
—
1000
30
—
—
150
—
—
—
—
+3.5
—
—
1.5
5
—
—
—
—
16
3
—
—
—
Unit
µV
µV/°C
nV/mo
pA
I
BIAS
T
A
= +25°C
0°C < T
A
< +70°C
– 25°C < T
A
< +85°C
T
A
= +25°C
0°C < T
A
< +70°C
– 25°C < T
A
< +85°C
pA
I
OS
R
IN
OL
V
OUT
CMVR
MRR
PSRR
e
N
I
N
GBW
SR
V
DD
, V
SS
I
S
f
CH
R
L
= 10kW, V
OUT
=
±4V
R
L
= 10kW
R
L
= 100kW
pA
W
dB
V
V
dB
dB
µV
P-P
µV
P-P
pA/√Hz
MHz
V/µsec
%
V
mA
Hz
µA
pA
CMVR = – 4.3V to +3.5V
±3V
to
±8V
R
S
= 100W, DC to 1Hz
DC to 10Hz
f = 10Hz
C
L
= 50 pF, R
L
= 10kW
No Load
Pins 12 – 14 Open (DIP)
R
L
= 100kW
– 4V
≤
V
OUT
< +10V
NOTES:
1. Limiting input current to 100µA is recommended to avoid latch-up problems. Typically, 1mA is safe; however, this is not guaranteed.
2. Output clamp not connected. See typical characteristics curves for output swing versus clamp current characteristics.
3-282
TELCOM SEMICONDUCTOR, INC.
LOW NOISE, CHOPPER-STABILIZED
OPERATIONAL AMPLIFIER
TC7652
Capacitor Connection
Connect the null-storage capacitors to the C
A
and C
B
pins with a common connection to the C
RET
pin (14-pin
TC7652) or to V
SS
(8-pin TC7652). When connecting to V
SS
,
avoid injecting load current IR drops into the capacitive
circuitry by making this connection directly via a separate
wire or PC trace.
If the TC7652's output saturates, error voltages on the
external capacitors will slow overload recovery. This condi-
tion can be avoided if a strobe signal is available. The strobe
signal is applied to EXT CLK IN and the overload signal is
applied to the amplifier while the strobe is LOW. In this case,
neither capacitor will be charged. The low leakage of the
capacitor pins allow long measurements to be made with
negligible errors (typical capacitor drift is 10µV/sec).
1
2
3
4
5
6
7
Output Clamp
In chopper-stabilized amplifiers, the output clamp pin
reduces overload recovery time. When a connection is
made to the inverting input pin (summing junction), a current
path is created between that point and the output pin, just
before the device output saturates. This prevents uncon-
trolled differential input voltages and charge buildup on
correction-storage capacitors. Output swing is reduced.
APPLICATION NOTES
Component Selection
C
A
and C
B
(external capacitors) should be in the 0.1µF
to 1µF range. For minimum clock ripple noise, use a 1µF
capacitor in broad bandwidth circuits. For limited bandwidth
applications where clock ripple is filtered out, use a 0.1µF
capacitor for slightly lower offset voltage. High-quality film-
type capacitors (polyester or polypropylene) are recom-
mended, although a lower grade (ceramic) may work in
some applications. For quickest settling after initial turn-on,
use low dielectric absorption capacitors (e.g., polypropy-
lene). With ceramic capacitors, settling to 1µV takes
several seconds.
Clock
The TC7652 has a 550Hz internal oscillator, which is
divided by two before clocking the input chopper switches.
The 275Hz chopping frequency is available at INT CLK OUT
(pin 12) on 14-pin devices. In normal operation, INT/EXT
(pin 14), which has an internal pull-up, can be left open.
An external clock can also be used. To disable the
internal clock and use an external one, the INT/EXT pin must
be tied to V
SS
. The external clock signal is then applied to the
EXT CLK IN input (pin 13). An internal divide-by-two pro-
vides a 50% switching duty cycle. The capacitors are only
charged when EXT CLK IN is high, so a 50% to 80% positive
duty cycle is recommended for higher clock frequencies.
The external clock can swing between V
DD
and V
SS
, with the
logic threshold about 2.5V below V
DD
.
The output of the internal oscillator, before the divide-
by-two circuit, is available at EXT CLK IN when INT/EXT is
high or unconnected. This output can serve as the clock
input for a second TC7652 (operating in a master/slave
mode), so that both op amps will clock at the same fre-
quency. This prevents clock intermodulation effects when
two TC7652's are used in a differential amplifier configura-
tion.
TEST CIRCUIT
R2
1 MΩ
R1
1 k
Ω
+
–
C
Static Protection
Although input diodes static-protect all device pins,
avoid strong electrostatic fields and discharges that can
cause degraded diode junction characteristics and produce
increased input-leakage currents.
Latch-Up
Junction-isolated CMOS circuits have a 4-layer (p-n-
p-n) structure similar to an SCR. Sometimes this junction
can be triggered into a low-impedance state and produce
excessive supply current. Therefore, avoid applying voltage
greater than 0.3V beyond the supply rails to any pin. Estab-
lish the amplifier supplies at the same time or before any
input signals are applied. If this is not possible, drive circuits
must limit input current flow to under 1mA to avoid latch-up,
even under fault conditions.
Output Stage/Load Driving
The output circuit is high impedance (about 18kΩ). With
lesser loads, the chopper amplifier behaves somewhat like
a transconductance amplifier with an open-loop gain propor-
tional to load resistance. (For example, the open-loop gain
is 17dB lower with a 1kΩ load than with a 10kΩ load.) If the
amp is used only for DC, the DC gain is typically greater than
120dB (even with a 1kΩ load), and this lower gain is
inconsequential. For wideband, the best frequency response
occurs with a load resistor of at least 10kΩ. This produces
3-283
TC7652
OUTPUT
C
0.1 µF
R
0.1 µF
8
TELCOM SEMICONDUCTOR, INC.
LOW NOISE, CHOPPER-STABILIZED
OPERATIONAL AMPLIFIER
TC7652
CONNECTION OF INPUT GUARDS
Inverting Amplifier
R1
INPUT
–
–
R2
Follower
OUTPUT
INPUT
+
+
OUTPUT
TC7652
TC7652
Noninverting Amplifier
R2
R1
INPUT
a 6dB/octave response from 0.1Hz to 2MHz, with phase
shifts of less than 2 degrees in the transition region, where
the main amplifier takes over from the null amplifier.
Thermoelectric Effects
The thermoelectric (Seebeck) effects in thermocouple
junctions of dissimilar metals, alloys, silicon, etc. limit ultra-
high-precision DC amplifiers. Unless all junctions are at the
same temperature, thermoelectric voltages around 0.1µV/
°C
(up to tens of
µV/°C
for some materials) are generated.
To realize the low offset voltages of the chopper, avoid
temperature gradients. Enclose components to eliminate air
movement, especially from power-dissipating elements in
the system. Where possible, use low thermoelectric-coeffi-
cient connections. Keep power supply voltages and power
dissipation to a minimum. Use high-impedance loads and
seek maximum separation from surrounding heat-dissipat-
ing elements.
Guarding
To benefit from TC7652 low-input currents, take care
assembling printed circuit boards. Clean boards with alco-
hol or TCE, and blow dry with compressed air. To prevent
contamination, coat boards with epoxy or silicone rubber.
Even if boards are cleaned and coated, leakage cur-
rents may occur because input pins are next to pins at supply
potentials. To reduce this leakage, use guarding to lower the
3-284
+
–
OUTPUT
TC7652
voltage difference between the inputs and adjacent metal
runs. The guard (a conductive ring surrounding inputs) is
connected to a low-impedance point at about the same
voltage as inputs. The guard absorbs leakage currents from
high-voltage pins.
The 14-pin dual-in-line arrangement simplifies guard-
ing. Like the LM108 pin configuration (but unlike the 101A
and 741), pins next to inputs are not used.
Pin Compatibility
Where possible, the 8-pin device pinout conforms to
such industry standards as the LM101 and LM741. Null-
storing external capacitors connect to pins 1 and 8, which
are usually for offset-null or compensation capacitors. Output
clamp (pin 5) is similarly used. For OP05 and OP07 devices,
replacement of the offset-null potentiometer (connected
between pins 1 and 8 and V
DD
by two capacitors from
those pins to V
SS
) provides compatibility. Replacing the
compensation capacitor between pins 1 and 8 by two
capacitors to V
SS
is required. The same operation (with the
removal of any connection to pin 5) works for LM101,
µA748,
and similar parts.
Because NC pins provide guarding between input and
other pins, the 14-pin device pinout conforms closely to the
LM108. Because this device does not use any extra pins and
does not provide offset-nulling (but requires a compensation
capacitor), some layout changes are necessary to convert to
the TC7652.
TELCOM SEMICONDUCTOR, INC.
LOW NOISE, CHOPPER-STABILIZED
OPERATIONAL AMPLIFIER
TC7652
Some Applications
Figures 1 and 2 show basic inverting and noninverting
amplifier circuits using the output clamping circuit to enhance
overload recovery performance. The only limitations on
replacing other op amps with the TC7652 are supply voltage
(±8V maximum) and output drive capability (10kΩ load for
full swing). Overcome these limitations with a booster circuit
(Figure 3) to combine output capabilities of the LM741 (or
other standard device) with input capabilities of the TC7652.
These two form a composite device; therefore, when adding
the feedback network, monitor loop gain stability.
Figure 4 shows the clamp circuit of a zero-offset com-
parator. Because the clamp circuit requires the inverting
input to follow the input signal, problems with a chopper-
stabilized op amp are avoided. The threshold input must
tolerate the output clamp current
≈V
IN
/R without disrupting
other parts of the system.
Figure 5 shows how the TC7652 can offset-null high
slew-rate and wideband amplifiers.
Mixing the TC7652 with circuits operating at
±15V
requires a lower supply voltage divider with the TC7660
voltage converter circuit operated "backwards." Figure 6
shows an approximate connection.
1
2
3
4
5
6
7
0.1 µF
INPUT
+
0.1 µF
TC7652
OUTPUT
–
CLAMP
R3
R2
0.1 µF
VIN
+
–
0.1 µF
TC7652
VOUT
CLAMP
200 k
Ω
to 2 MΩ
VTH
R1
Figure 1. Noninverting Amplifier With Optional Clamp
Figure 4. Low Offset Comparator
R2
R1
INPUT
+
–
OUTPUT
IN
CLAMP
+
TC7652
TC7652
–
22 k
Ω
22 k
Ω
+
OUT
–
0.1 µF
0.1 µF
FAST
AMPLIFIER
Figure 2. Inverting Amplifier With Optional Clamp
Figure 5. 1437 Offset-Nulled by TC7652
–7.5V
+
IN
–
–
–7.5V
–15V
0.1
µF
10 k
Ω
+15V
+
2
8
+15V
+7.5V
10 µF
0V
741
OUT
10 µF
4
TC
3
7660
6
5
TC7652
0.1
µF
1 M
Ω
Figure 6. Splitting +15V With the 7660 at >95% Efficiency
3-285
Figure 3. Using 741 to Boost Output Drive Capability
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