548AMI-03LF datasheet, PDF - EEWORLD Datasheet

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548AMI-03LF: DescriptionClock Driver, 548 Series, 2 True Output(s), 1 Inverted Output(s), PDSO16, 0.150 INCH, GREEN, SOIC-16; Categorylogic logic; File Size130KB，7 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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548AMI-03LF Overview

Clock Driver, 548 Series, 2 True Output(s), 1 Inverted Output(s), PDSO16, 0.150 INCH, GREEN, SOIC-16

548AMI-03LF Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	SOIC
package instruction	SOP, SOP16,.25
Contacts	16
Reach Compliance Code	compliant
ECCN code	EAR99
series	548
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G16
JESD-609 code	e3
length	9.9 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.012 A
Humidity sensitivity level	3
Number of functions	1
Number of inverted outputs	1
Number of terminals	16
Actual output times	2
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP16,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.85 ns
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	3.47 V
Minimum supply voltage (Vsup)	3.13 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm
minfmax	120 MHz
Base Number Matches	1

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DATASHEET

LOW SKEW CLOCK INVERTER AND DIVIDER

Description

The ICS548A-03 is a low cost, low skew, high-performance

general purpose clock designed to produce a set of one

output clock, one inverted output clock, and one clock

divided-by-two. Using our patented Phase-Locked Loop

(PLL) techniques, the device operates from a frequency

range of 10 MHz to 120 MHz in the PLL mode, and up to

160 MHz in the non-PLL mode.

In applications that need to maintain low phase noise in the

clock tree, the non-PLL (when S3=S2=1) modes should be

used.

This chip is not a zero delay buffer. Many applications may

be able to use the ICS527 for zero delay dividers.

ICS548A-03

Features

•

Packaged in 16-pin SOIC (150 mil)

Input clock up to 160 MHz in the non-PLL mode

Provides clock outputs of CLK, CLK, and CLK/2

Low skew (500 ps) on CLK, CLK, and CLK/2

All outputs can be tri-stated

Entire chip can be powered down by changing one or two

select pins

•

3.3 V operating range

•

Available in commercial and industrial temperature

ranges

•

RoHS 5 (green) or RoHS 6 (green and lead free)

compliant package

Block Diagram

VDD

GND

CLK

S3:S0

Clock

input

Input

Buffer

Clock

Synthesis

and Divider

Circuitry

CLK

CLK/2

OE (all outputs)

IDT™ / ICS™

LOW SKEW CLOCK INVERTER AND DIVIDER

ICS548A-03

REV C 063006

548AMI-03LF Related Products

	548AMI-03LF	548AMI-03LFT	548AM-03LF	548AM-03LFT
Description	Clock Driver, 548 Series, 2 True Output(s), 1 Inverted Output(s), PDSO16, 0.150 INCH, GREEN, SOIC-16	Clock Driver, 548 Series, 2 True Output(s), 1 Inverted Output(s), PDSO16, 0.150 INCH, GREEN, SOIC-16	Clock Driver, 548 Series, 2 True Output(s), 1 Inverted Output(s), PDSO16, 0.150 INCH, GREEN, SOIC-16	Clock Driver, 548 Series, 2 True Output(s), 1 Inverted Output(s), PDSO16, 0.150 INCH, GREEN, SOIC-16
Is it lead-free?	Lead free	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to	conform to
Parts packaging code	SOIC	SOIC	SOIC	SOIC
package instruction	SOP, SOP16,.25	SOP, SOP16,.25	SOP, SOP16,.25	SOP, SOP16,.25
Contacts	16	16	16	16
Reach Compliance Code	compliant	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99
series	548	548	548	548
Input adjustment	STANDARD	STANDARD	STANDARD	STANDARD
JESD-30 code	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16
JESD-609 code	e3	e3	e3	e3
length	9.9 mm	9.9 mm	9.9 mm	9.9 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.012 A	0.012 A	0.012 A	0.012 A
Humidity sensitivity level	3	3	3	3
Number of functions	1	1	1	1
Number of inverted outputs	1	1	1	1
Number of terminals	16	16	16	16
Actual output times	2	2	2	2
Maximum operating temperature	85 °C	85 °C	70 °C	70 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP	SOP	SOP
Encapsulate equivalent code	SOP16,.25	SOP16,.25	SOP16,.25	SOP16,.25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260	260	260	260
power supply	3.3 V	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.85 ns	0.85 ns	0.85 ns	0.85 ns
Maximum seat height	1.75 mm	1.75 mm	1.75 mm	1.75 mm
Maximum supply voltage (Vsup)	3.47 V	3.47 V	3.47 V	3.47 V
Minimum supply voltage (Vsup)	3.13 V	3.13 V	3.13 V	3.13 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES
Temperature level	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30
width	3.9 mm	3.9 mm	3.9 mm	3.9 mm
minfmax	120 MHz	120 MHz	120 MHz	120 MHz
Base Number Matches	1	1	1	1

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