EEWORLDEEWORLDEEWORLD

Part Number

Search

511HCA-CAAG

Description
osc prog 2.5V hcsl 20ppm 5x7mm
CategoryPassive components   
File Size1MB,26 Pages
ManufacturerSilicon
Environmental Compliance  
Download Datasheet View All

511HCA-CAAG Overview

osc prog 2.5V hcsl 20ppm 5x7mm

S i 5 1 0 / 5 11
C
R YS TA L
O
SCILLATOR
(XO) 100 kH
Z
Features
TO
250 MH
Z
Supports any frequency from
100 kHz to 250 MHz
Low jitter operation
2 to 4 week lead times
Total stability includes 10-year
aging
Comprehensive production test
coverage includes crystal ESR and
DLD
On-chip LDO regulator for power
supply noise filtering
3.3, 2.5, or 1.8 V operation
Differential (LVPECL, LVDS,
HCSL) or CMOS output options
Optional integrated 1:2 CMOS
fanout buffer
Runt suppression on OE and
power on
Industry standard 5 x 7 and
3.2 x 5 mm packages
Pb-free, RoHS compliant
–40
to 85
o
C operation
Si5602
Applications
SONET/SDH/OTN
Gigabit Ethernet
Fibre Channel/SAS/SATA
PCI Express
Ordering Information:
See page 14.
3G-SDI/HD-SDI/SDI
Telecom
Switches/routers
FPGA/ASIC clock generation
Pin Assignments:
See page 12.
Description
The Si510/511 XO utilizes Silicon Laboratories' advanced DSPLL technology
to provide any frequency from 100 kHz to 250 MHz. Unlike a traditional XO
where a different crystal is required for each output frequency, the Si510/511
uses one fixed crystal and Silicon Labs’ proprietary DSPLL synthesizer to
generate any frequency across this range. This IC-based approach allows
the crystal resonator to provide enhanced reliability, improved mechanical
robustness, and excellent stability. In addition, this solution provides superior
supply noise rejection, simplifying low jitter clock generation in noisy
environments. Crystal ESR and DLD are individually production-tested to
guarantee performance and enhance reliability. The Si510/511 is factory-
configurable for a wide variety of user specifications, including frequency,
supply voltage, output format, output enable polarity, and stability. Specific
configurations are factory-programmed at time of shipment, eliminating long
lead times and non-recurring engineering charges associated with custom
frequency oscillators.
OE
1
4
V
DD
GND
2
3
CLK
Si510 (CMOS)
NC
OE
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Functional Block Diagram
V
DD
OE
Si510(LVDS/LVPECL/HCSL/
Dual CMOS)
OE
OE
1
1
2
2
3
3
6
6
5
5
4
4
V
DD
V
DD
CLK–
CLK–
CLK+
CLK+
Low Noise Regulator
Fixed
Frequency
Oscillator
Any-Frequency
0.1 to 250 MHz
DSPLL
®
Synthesis
CLK+
CLK–
NC
NC
GND
GND
GND
Si511(LVDS/LVPECL/HCSL/
Dual CMOS)
Rev. 1.2 7/15
Copyright © 2015 by Silicon Laboratories
Si510/511
My laptop hard drive is broken. If anyone has a circuit board, buy one. Samsung MP0402H. It doesn't matter if it's new or old, as long as the circuit board is good.
My laptop hard drive is broken. If anyone has a circuit board, I would like to buy one. Samsung MP0402H. It doesn't matter if it's new or old, as long as the circuit board is good. If you have one, pl...
liangmin022 Embedded System
Wince program automatically changes to read-only state when opening word document
I used CreateProcess("\\Windows\\pword.exe", sPath, IntPtr.Zero, IntPtr.Zero, 0, 0, IntPtr.Zero, IntPtr.Zero, new Byte[128], pi); to open a document. I want to make the document read-only when opening...
excellence Embedded System
How to add stimulus files in quartus?
How to add stimulus files in quartus?The method is as follows:...
eeleader FPGA/CPLD
I failed the CET-4
[i=s] This post was last edited by paulhyde on 2014-9-15 03:40 [/i] I am so depressed. I didn’t pass the CET-4 with a score of 417. I studied English every day last semester and still ended up like th...
william228 Electronics Design Contest
The function simulation is correct, but it is not correct after downloading. Why?
I have encountered this situation several times. The simulation function is fine with modelsim, and the program is not complicated, but after burning it to the board, the function cannot be realized! ...
pinggougou FPGA/CPLD
What are the advantages and disadvantages of double-layer PCB and multi-layer PCB?
If you are interested, I hope you can share the characteristics, advantages and disadvantages of double-layer PCB and multi-layer PCB....
王小明A PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 681  1121  1272  2521  810  14  23  26  51  17 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号