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PIC32MX450F128HT-120I/MR

Description
RISC MICROCONTROLLER
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size6MB,360 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Download Datasheet Parametric View All

PIC32MX450F128HT-120I/MR Overview

RISC MICROCONTROLLER

PIC32MX450F128HT-120I/MR Parametric

Parameter NameAttribute value
Objectid8100817507
package instructionQFN-64
Reach Compliance Codecompliant
Country Of OriginThailand
ECCN code3A991.A.2
YTEOL8.38
Has ADCYES
Other featuresALSO AVAILABLE 2 DEDICATED DMA CHANNELS
Address bus width
bit size32
boundary scanYES
CPU seriesPIC32
maximum clock frequency80 MHz
DAC channelNO
DMA channelYES
External data bus width
JESD-30 codeS-PQCC-N64
length9 mm
Number of DMA channels4
Number of I/O lines49
Number of terminals64
Number of timers5
On-chip program ROM width8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
PWM channelYES
Package body materialPLASTIC/EPOXY
encapsulated codeHVQCCN
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
RAM (bytes)32768
rom(word)143360
ROM programmabilityFLASH
Filter levelTS 16949
Maximum seat height1 mm
speed100 MHz
Maximum supply voltage3.6 V
Minimum supply voltage2.3 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
width9 mm
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER, RISC

PIC32MX450F128HT-120I/MR Preview

PIC32MX330/350/370/430/450/470
32-bit Microcontrollers (up to 512 KB Flash and 128 KB SRAM)
with Audio/Graphics/Touch (HMI), USB, and Advanced Analog
Operating Conditions: 2.3V to 3.6V
• -40ºC to +105ºC (DC to 80 MHz)
• -40ºC to +85ºC (DC to 100 MHz)
• 0ºC to +70ºC (DC to 120 MHz)
Timers/Output Compare/Input Capture
• Five General Purpose Timers:
- Five 16-bit and up to two 32-bit Timers/Counters
• Five Output Compare (OC) modules
• Five Input Capture (IC) modules
• Peripheral Pin Select (PPS) to allow function remap
• Real-Time Clock and Calendar (RTCC) module
Core: 120 MHz/150 DMIPS MIPS32
®
M4K
®
• MIPS16e
®
mode for up to 40% smaller code size
• Code-efficient (C and Assembly) architecture
• Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply
Communication Interfaces
• USB 2.0-compliant Full-speed OTG controller
• Up to five UART modules (20 Mbps):
- LIN 1.2 protocols and IrDA
®
support
• Two 4-wire SPI modules (25 Mbps)
• Two I
2
C modules (up to 1 Mbaud) with SMBus support
• PPS to allow function remap
• Parallel Master Port (PMP)
Clock Management
0.9% internal oscillator
Programmable PLLs and oscillator clock sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer
Fast wake-up and start-up
Power Management
• Low-power management modes (Sleep and Idle)
• Integrated Power-on Reset, Brown-out Reset, and High
Voltage Detect
• 0.5 mA/MHz dynamic current (typical)
• 50
μA
I
PD
current (typical)
Direct Memory Access (DMA)
• Four channels of hardware DMA with automatic data
size detection
• 32-bit Programmable Cyclic Redundancy Check (CRC)
• Two additional channels dedicated to USB
Audio/Graphics/Touch HMI Features
External graphics interface with up to 34 PMP pins
Audio data communication: I
2
S, LJ, RJ, USB
Audio data control interface: SPI and I
2
C™
Audio data master clock:
- Generation of fractional clock frequencies
- Can be synchronized with USB clock
- Can be tuned in run-time
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
Input/Output
• 15 mA or 12 mA source/sink for standard V
OH
/V
OL
and
up to 22 mA for non-standard V
OH1
• 5V-tolerant pins
• Selectable open drain, pull-ups, and pull-downs
• External interrupts on all I/O pins
Qualification and Class B Support
• AEC-Q100 REVG (Grade 2 -40ºC to +105ºC) planned
• Class B Safety Library, IEC 60730
Debugger Development Support
In-circuit and in-application programming
4-wire MIPS
®
Enhanced JTAG interface
Unlimited program and six complex data breakpoints
IEEE 1149.2-compatible (JTAG) boundary scan
Advanced Analog Features
• ADC Module:
- 10-bit 1 Msps rate with one Sample and Hold (S&H)
- Up to 28 analog inputs
- Can operate during Sleep mode
• Flexible and independent ADC trigger sources
• On-chip temperature measurement capability
• Comparators:
- Two dual-input Comparator modules
- Programmable references with 32 voltage points
Packages
Type
QFN
TQFP
100
85
0.40
12x12x1
100
85
0.50
14x14x1
VTLA
124
85
0.50
9x9x0.9
Pin Count
64
64
I/O Pins (up to)
53
53
Contact/Lead Pitch
0.50
0.50
Dimensions
9x9x0.9
10x10x1
Note:
All dimensions are in millimeters (mm) unless specified.
2012-2015 Microchip Technology Inc.
DS60001185D-page 1
PIC32MX330/350/370/430/450/470
TABLE 1:
PIC32MX330/350/370/430/450/470 CONTROLLER FAMILY FEATURES
10-bit 1 Msps ADC (Channels)
Remappable Peripherals
Program Memory (KB)
(1)
Timers/Capture/Compare
(2)
Data Memory (KB)
DMA Channels
(Programmable/Dedicated)
USB On-The-Go (OTG)
External Interrupts
(3)
Remappable Pins
Analog Comparators
Packages
I/O Pins
Device
CTMU
RTCC
PIC32MX330F064H
PIC32MX330F064L
PIC32MX350F128H
PIC32MX350F128L
PIC32MX350F256H
PIC32MX350F256L
PIC32MX370F512H
PIC32MX370F512L
PIC32MX430F064H
PIC32MX430F064L
PIC32MX450F128H
PIC32MX450F128L
PIC32MX450F256H
PIC32MX450F256L
PIC32MX470F512H
PIC32MX470F512L
Note
1:
2:
3:
64
100
124
64
100
124
64
100
124
64
100
124
64
100
124
64
100
124
64
100
124
64
100
124
QFN,
TQFP
TQFP
VTLA
QFN,
TQFP
TQFP
VTLA
QFN,
TQFP
TQFP
VTLA
QFN,
TQFP
TQFP
VTLA
QFN,
TQFP
TQFP
VTLA
QFN,
TQFP
TQFP
VTLA
QFN,
TQFP
TQFP
VTLA
QFN,
TQFP
TQFP
VTLA
64+12
64+12
128+12
128+12
256+12
256+12
512+12
512+12
64+12
64+12
128+12
128+12
256+12
256+12
512+12
512+12
16
16
32
32
64
64
128
128
16
16
32
32
64
64
128
128
37
54
37
54
37
54
37
54
34
51
34
51
34
51
34
51
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
4
5
4
5
4
5
4
5
4
5
4
5
4
5
4
5
SPI/I
2
S
UART
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
N
N
N
N
N
N
N
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
4/0
4/0
4/0
4/0
4/0
4/0
4/0
4/0
4/2
4/2
4/2
4/2
4/2
4/2
4/2
4/2
53
85
53
85
53
85
53
85
49
81
49
81
49
81
49
81
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
All devices feature 12 KB of Boot Flash memory.
Four out of five timers are remappable.
Four out of five external interrupts are remappable.
DS60001185D-page 2
2012-2015 Microchip Technology Inc.
Trace
N
Y
N
Y
N
Y
N
Y
N
Y
N
Y
N
Y
N
Y
JTAG
I
2
C™
PMP
Pins
PIC32MX330/350/370/430/450/470
Device Pin Tables
TABLE 2:
PIN NAMES FOR 64-PIN DEVICES
64-PIN QFN
(1,2,3,4)
AND TQFP
(1,2,3)
(TOP VIEW)
PIC32MX330F064H
PIC32MX350F128H
PIC32MX350F256H
PIC32MX370F512H
64
1
64
QFN
(4)
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Note
AN22/RPE5/PMD5/RE5
AN23/PMD6/RE6
AN27/PMD7/RE7
AN16/C1IND/RPG6/SCK2/PMA5/RG6
AN17/C1INC/RPG7/PMA4/RG7
AN18/C2IND/RPG8/PMA3/RG8
MCLR
AN19/C2INC/RPG9/PMA2/RG9
V
SS
V
DD
AN5/C1INA/RPB5/RB5
AN4/C1INB/RB4
PGED3/AN3/C2INA/RPB3/RB3
PGEC3/AN2/C2INB/RPB2/CTED13/RB2
PGEC1/V
REF
-/CV
REF
-/AN1/RPB1/CTED12/RB1
PGED1/V
REF
+/CV
REF
+/AN0/RPB0/PMA6/RB0
PGEC2/AN6/RPB6/RB6
PGED2/AN7/RPB7/CTED3//RB7
AV
DD
AV
SS
AN8/RPB8/CTED10//RB8
AN9/RPB9/CTED4/PMA7/RB9
TMS/C
VREFOUT
/AN10/RPB10/CTED11//PMA13/RB10
TDO/AN11/PMA12/RB11
V
SS
V
DD
TCK/AN12/PMA11/RB12
TDI/AN13/PMA10/RB13
AN14/RPB14/CTED5/PMA1/RB14
AN15/RPB15/OCFB/CTED6/PMA0/RB15
RPF4/SDA2/PMA9/RF4
RPF5/SCL2/PMA8/RF5
1:
2:
3:
4:
Full Pin Name
Pin #
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
RPF3/RF3
RPF2/RF2
RPF6/SCK1/INT0/RF6
SDA1/RG3
SCL1/RG2
V
DD
OSC1/CLKI/RC12
OSC2/CLKO/RC15
V
SS
RPD8/RTCC/RD8
RPD9/RD9
RPD10/PMCS2/RD10
RPD11/PMCS1/RD11
RPD0/RD0
SOSCI/RPC13/RC13
SOSCO/RPC14/T1CK/RC14
AN24/RPD1/RD1
AN25/RPD2/RD2
AN26/RPD3/RD3
RPD4/PMWR/RD4
RPD5/PMRD/RD5
RD6
RD7
V
CAP
V
DD
RPF0/RF0
RPF1/RF1
PMD0/RE0
PMD1/RE1
AN20/PMD2/RE2
RPE3/CTPLS/PMD3/RE3
AN21/PMD4/RE4
TQFP
Full Pin Name
1
The RPn pins can be used by remappable peripherals. See
Table 1
for the available peripherals and
Section 12.3 “Peripheral Pin
Select”
for restrictions.
Every I/O port pin (RAx-RGx), with the exception of RF6, can be used as a change notification pin (CNAx-CNGx). See
Section 12.0 “I/O
Ports”
for more information.
The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to V
SS
externally.
RPF6 (pin 35) is only available for output functions.
2012-2015 Microchip Technology Inc.
DS60001185D-page 3
PIC32MX330/350/370/430/450/470
TABLE 3:
PIN NAMES FOR 64-PIN DEVICES
64-PIN QFN
(1,2,3,4)
AND TQFP
(1,2,3)
(TOP VIEW)
PIC32MX430F064H
PIC32MX450F128H
PIC32MX450F256H
PIC32MX470F512H
64
1
64
QFN
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Note
AN22/RPE5/PMD5/RE5
AN23/PMD6/RE6
AN27/PMD7/RE7
AN16/C1IND/RPG6/SCK2/PMA5/RG6
AN17/C1INC/RPG7/PMA4/RG7
AN18/C2IND/RPG8/PMA3/RG8
MCLR
AN19/C2INC/RPG9/PMA2/RG9
V
SS
V
DD
AN5/C1INA/RPB5/V
BUSON
/RB5
AN4/C1INB/RB4
PGED3/AN3/C2INA/RPB3/RB3
PGEC3/AN2/C2INB/RPB2/CTED13/RB2
PGEC1/V
REF
-/CV
REF
-/AN1/RPB1/CTED12/RB1
PGED1/V
REF
+/CV
REF
+/AN0/RPB0/PMA6/RB0
PGEC2/AN6/RPB6/RB6
PGED2/AN7/RPB7/CTED3//RB7
AV
DD
AV
SS
AN8/RPB8/CTED10//RB8
AN9/RPB9/CTED4/PMA7/RB9
TMS/C
VREFOUT
/AN10/RPB10/CTED11//PMA13/RB10
TDO/AN11/PMA12/RB11
V
SS
V
DD
TCK/AN12/PMA11/RB12
TDI/AN13/PMA10/RB13
AN14/RPB14/CTED5/PMA1/RB14
AN15/RPB15/OCFB/CTED6/PMA0/RB15
RPF4/SDA2/PMA9/RF4
RPF5/SCL2/PMA8/RF5
1:
2:
3:
4:
Full Pin Name
Pin #
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
USBID/RPF3/RF3
V
BUS
V
USB3V3
D-
D+
V
DD
OSC1/CLKI/RC12
OSC2/CLKO/RC15
V
SS
RPD8/RTCC/RD8
RPD9/SDA1/RD9
RPD10/SCL1/PMCS2/RD10
RPD11/PMCS1/RD11
RPD0/INT0/RD0
SOSCI/RPC13/RC13
SOSCO/RPC14/T1CK/RC14
AN24/RPD1/RD1
AN25/RPD2/SCK1/RD2
AN26/RPD3/RD3
RPD4/PMWR/RD4
RPD5/PMRD/RD5
RD6
RD7
V
CAP
V
DD
RPF0/RF0
RPF1/RF1
PMD0/RE0
PMD1/RE1
AN20/PMD2/RE2
RPE3/CTPLS/PMD3/RE3
AN21/PMD4/RE4
TQFP
Full Pin Name
1
The RPn pins can be used by remappable peripherals. See
Table 1
for the available peripherals and
Section 12.3 “Peripheral Pin
Select”
for restrictions.
Every I/O port pin (RAx-RGx), with the exception of RF6, can be used as a change notification pin (CNAx-CNGx). See
Section 12.0 “I/O
Ports”
for more information.
The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to V
SS
externally.
RPF6 (pin 35) is only available for output functions.
DS60001185D-page 4
2012-2015 Microchip Technology Inc.
PIC32MX330/350/370/430/450/470
TABLE 4:
PIN NAMES FOR 100-PIN DEVICES
100-PIN TQFP (TOP VIEW)
(1,2,3)
PIC32MX330F064L
PIC32MX350F128L
PIC32MX350F256L
PIC32MX370F512L
100
1
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
Note
RG15
V
DD
AN22/RPE5/PMD5/RE5
AN23/PMD6/RE6
AN27/PMD7/RE7
RPC1/RC1
RPC2/RC2
RPC3/RC3
RPC4/CTED7/RC4
AN16/C1IND/RPG6/SCK2/PMA5/RG6
AN17/C1INC/RPG7/PMA4/RG7
AN18/C2IND/RPG8/PMA3/RG8
MCLR
AN19/C2INC/RPG9/PMA2/RG9
V
SS
V
DD
TMS/CTED1/RA0
RPE8/RE8
RPE9/RE9
AN5/C1INA/RPB5/RB5
AN4/C1INB/RB4
PGED3/AN3/C2INA/RPB3/RB3
PGEC3/AN2/C2INB/RPB2/CTED13/RB2
PGEC1/AN1/RPB1/CTED12/RB1
PGED1/AN0/RPB0/RB0
PGEC2/AN6/RPB6/RB6
PGED2/AN7/RPB7/CTED3/RB7
V
REF
-/CV
REF
-/PMA7/RA9
V
REF
+/CV
REF
+/PMA6/RA10
AV
DD
AV
SS
AN8/RPB8/CTED10/RB8
AN9/RPB9/CTED4/RB9
C
VREFOUT
/AN10/RPB10/CTED11PMA13/RB10
AN11/PMA12/RB11
1:
2:
3:
Full Pin Name
Pin #
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
V
SS
V
DD
TCK/CTED2/RA1
RPF13/RF13
RPF12/RF12
AN12/PMA11/RB12
AN13/PMA10/RB13
AN14/RPB14/CTED5/PMA1/RB14
AN15/RPB15/OCFB/CTED6/PMA0/RB15
V
SS
V
DD
RPD14/RD14
RPD15/RD15
RPF4/PMA9/RF4
RPF5/PMA8/RF5
RPF3/RF3
RPF2/RF2
RPF8/RF8
RPF7/RF7
RPF6/SCK1/INT0/RF6
SDA1/RG3
SCL1/RG2
SCL2/RA2
SDA2/RA3
TDI/CTED9/RA4
TDO/RA5
V
DD
OSC1/CLKI/RC12
OSC2/CLKO/RC15
V
SS
RPA14/RA14
RPA15/RA15
RPD8/RTCC/RD8
RPD9/RD9
RPD10/PMCS2/RD10
Full Pin Name
The RPn pins can be used by remappable peripherals. See
Table 1
for the available peripherals and
Section 12.3 “Peripheral Pin
Select”
for restrictions.
Every I/O port pin (RAx-RGx), with the exception of RF6, can be used as a change notification pin (CNAx-CNGx). See
Section 12.0 “I/O
Ports”
for more information.
RPF7 (pin 54) is only remappable for input functions.
2012-2015 Microchip Technology Inc.
DS60001185D-page 5

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