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PIC32MZ1024ECK144-V/PL

Description
MICROCONTROLLER
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size12MB,658 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Download Datasheet Parametric View All

PIC32MZ1024ECK144-V/PL Overview

MICROCONTROLLER

PIC32MZ1024ECK144-V/PL Parametric

Parameter NameAttribute value
Objectid8164866972
package instructionLQFP-144
Reach Compliance Codecompliant
Country Of OriginThailand
ECCN code3A991.A.2
YTEOL8.23
Has ADCYES
Address bus width24
bit size32
boundary scanYES
CPU seriesPIC32
maximum clock frequency64 MHz
DAC channelNO
DMA channelYES
External data bus width16
JESD-30 codeS-PQFP-G144
length20 mm
Number of I/O lines120
Number of terminals144
On-chip program ROM width8
Maximum operating temperature105 °C
Minimum operating temperature-40 °C
PWM channelYES
Package body materialPLASTIC/EPOXY
encapsulated codeLFQFP
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE, FINE PITCH
rom(word)1048576
ROM programmabilityFLASH
Filter levelAEC-Q100; TS 16949
Maximum seat height1.6 mm
speed180 MHz
Maximum supply voltage3.6 V
Minimum supply voltage2.3 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
width20 mm
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER, RISC
PIC32MZ Embedded
Connectivity (EC) Family
32-bit MCUs (up to 2 MB Live-Update Flash and 512 KB SRAM) with
Audio and Graphics Interfaces, HS USB, Ethernet, and Advanced Analog
Operating Conditions
• 2.3V to 3.6V, -40ºC to +85ºC, DC to 200 MHz
• 2.3V to 3.6V, -40ºC to +105ºC, DC to 180 MHz
• 2.3V to 3.6V, -40ºC to +125ºC (Planned)
Advanced Analog Features
10-bit ADC resolution and up to 48 analog inputs
Flexible and independent ADC trigger sources
Two comparators with 32 programmable voltage references
Temperature sensor with ±2ºC accuracy
Core: 200 MHz (up to 330 DMIPS) microAptiv™
16 KB I-Cache, 4 KB D-Cache
MMU for optimum embedded OS execution
microMIPS™ mode for up to 35% smaller code size
DSP-enhanced core:
- Four 64-bit accumulators
- Single-cycle MAC, saturating and fractional math
• Code-efficient (C and Assembly) architecture
Communication Interfaces
• Two CAN modules (with dedicated DMA channels):
- 2.0B Active with DeviceNet™ addressing support
• Six UART modules (25 Mbps):
- Supports LIN 1.2 and IrDA
®
protocols
• Six 4-wire SPI modules
• SQI configurable as an additional SPI module (50 MHz)
• Five I
2
C modules (up to 1 Mbaud) with SMBus support
• Parallel Master Port (PMP)
• Peripheral Pin Select (PPS) to enable function remap
Clock Management
0.9% internal oscillator
Programmable PLLs and oscillator clock sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timers (WDT) and Deadman
Timer (DMT)
• Fast wake-up and start-up
Timers/Output Compare/Input Capture
Nine 16-bit or up to four 32-bit timers/counters
Nine Output Compare (OC) modules
Nine Input Capture (IC) modules
PPS to enable function remap
Real-Time Clock and Calendar (RTCC) module
Power Management
• Low-power modes (Sleep and Idle)
• Integrated Power-on Reset and Brown-out Reset
Input/Output
• 5V-tolerant pins with up to 32 mA source/sink
• Selectable open drain, pull-ups, and pull-downs
• External interrupts on all I/O pins
Memory Interfaces
• 50 MHz External Bus Interface (EBI)
• 50 MHz Serial Quad Interface (SQI)
Audio and Graphics Interfaces
Graphics interfaces: EBI or PMP
Audio data communication: I
2
S, LJ, and RJ
Audio control interfaces: SPI and I
2
C™
Audio master clock: Fractional clock frequencies with USB
synchronization
Qualification and Class B Support
AEC-Q100 REVG (Grade 2 -40ºC to +105ºC) Planned
AEC-Q100 REVG (Grade 1 -40ºC to +125ºC) Planned
Class B Safety Library, IEC 60730
Back-up internal oscillator
Debugger Development Support
In-circuit and in-application programming
4-wire MIPS
®
Enhanced JTAG interface
Unlimited software and 12 complex breakpoints
IEEE 1149.2-compatible (JTAG) boundary scan
Non-intrusive hardware-based instruction trace
High-Speed (HS) Communication Interfaces
(with Dedicated DMA)
• USB 2.0-compliant Hi-Speed On-The-Go (OTG) controller
• 10/100 Mbps Ethernet MAC with MII and RMII interface
Security Features
• Crypto Engine with a RNG for data encryption/decryption
and authentication (AES, 3DES, SHA, MD5, and HMAC)
• Advanced memory protection:
- Peripheral and memory region access control
Software and Tools Support
C/C++ compiler with native DSP/fractional support
MPLAB
®
Harmony Integrated Software Framework
TCP/IP, USB, Graphics, and mTouch™ middleware
MFi, Android™, and Bluetooth
®
audio frameworks
FreeRTOS™, OPENRTOS
®
, µC/OS™, and other popular
RTOS kernels
Direct Memory Access (DMA)
• Eight channels with automatic data size detection
• Programmable Cyclic Redundancy Check (CRC)
Packages
Type
Pin Count
I/O Pins (up to)
Contact/Lead Pitch
Dimensions
QFN
64
53
0.50 mm
9x9x0.9 mm
64
53
0.50 mm
10x10x1 mm
TQFP
100
78
0.40 mm
12x12x1 mm
0.50 mm
14x14x1 mm
144
120
0.40 mm
16x16x1 mm
VTLA
124
98
0.50 mm
9x9x0.9 mm
LQFP
144
120
0.50 mm
20x20x1.40 mm
2013-2014 Microchip Technology Inc.
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