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CTSLV310TG

Description
IC clock buffer 1:2 1.6ghz
Categorysemiconductor    Analog mixed-signal IC   
File Size215KB,9 Pages
ManufacturerCTS [CTS Corporation]
Environmental Compliance  
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CTSLV310TG Overview

IC clock buffer 1:2 1.6ghz

CTSLV310
Ultra-Low Phase Noise LVPECL, LVDS Buffer and Translator
SON8, MSOP8
FEATURES
2.5V-3.3V Operation
Ultra-Low Phase Noise Floor
o
LVPECL -167dBc/Hz
o
LVDS -165dBc/Hz
Configurable
o
LVPECL or LVDS Output
o
÷1 or ÷2
o
Enable Active High or Low
1GHz+ Bandwidth
RoHS Compliant Pb Free Packages
BLOCK DIAGRAM
DESCRIPTION
The CTSLV310 is a configurable LVPECL, LVDS buffer & translator IC that is optimized for ultra-low
phase noise and 2.5V-3.3V nominal supply voltage. It is particularly useful in converting crystal or
SAW based oscillators into LVPECL and LVDS outputs for up to 1GHz of bandwidth. For a design that
includes gain in the signal path, refer to the
CTSLV315.
A configurable IC design capable of providing LVPECL or LVDS outputs, ÷1 or ÷2 function, and active
high or active low enable selection. See Table 1 for details of the configurations options that provide
designers with a single IC buffer/translator solution that is extremely compact, flexible and high
performance.
8 configurations which are determined by the static voltage levels of b-0 and b-1. Table 1 details the
configurations.
Table 1 - Possible IC Configuration
Configuration Bits
b-0
Open
Open
Open
Low
Low
Low
High
High
High
b-1
Open
Low
High
Open
Low
High
Open
Low
High
Functional Configuration
Output Type
LVPECL
LVPECL
LVPECL
LVPECL
LVDS
LVDS
LVDS
LVDS
Not Used
Enable Polarity
Active High
Active High
Active Low
Active Low
Active High
Active High
Active Low
Active Low
Not Used
Division
÷1
÷2
÷1
÷2
÷1
÷2
÷1
÷2
Not Used
North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors
Specifications are subject to change without notice.
1
RevA0215
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