SY100EL16VBZG datasheet, PDF - EEWORLD Datasheet

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SY100EL16VBZG: DescriptionIC rcvr diff 3.3/5V 8-soic; CategoryAnalog mixed-signal IC Drivers and interfaces; File Size139KB，12 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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SY100EL16VBZG Overview

IC rcvr diff 3.3/5V 8-soic

SY100EL16VBZG Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Microchip
package instruction	SOP,
Reach Compliance Code	compliant
ECCN code	EAR99

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Micrel, Inc.

ENHANCED

DIFFERENTIAL

RECEIVER

DESCRIPTION

SY10EL16VA-VF

SY100EL16VA-VF

SY10EL16VA-VF

SY100EL16VA-VF

FEATURES

3.3V and 5V power supply options

250ps propagation delay

Very high voltage gain vs. standard EL16 or EL16V

Ideal for Pulse Amplifier and Limiting Amplifier

applications

Data synchronous Enable/Disable (/EN) on Q

and

provides for complete glitchless gating of the

outputs

Ideal for gating timing signals

Complete solution for high quality, high frequency

crystal oscillator applications

Internal 75k

Ω

input pull-down resistors

Available in both 8- and 16-pin SOIC package; 8- and

10-pin (3mm) MSOP and in DIE form

PIN NAMES

/EN

Data Inputs

Data Outputs

Data Outputs w/High Gain

Reference Voltage Output

Enable Input

Function

TRUTH TABLE

/EN

Data

Logic Low

QHG Output

The SY10/100EL16VA-VF are differential receivers.

The devices are equivalent to SY10/100EL16 or SY10/

100EL16V with enhanced capabilities. The Q

, /Q

outputs have a DC gain several times larger than the DC

gain of the Q output.

The SY10/100EL16VA have an identical pinout to the

SY10/100EL16 or SY10/100EL16V. It provides a V

output for either single-ended application or as a DC

bias for AC coupling to the device.

The SY10/100EL16VB are very similar to the SY10/

100EL16VA. The /Q output is provided for feedback

purposes.

The SY10/100EL16VC provides an /EN input which is

synchronized with the data input (D) signal in a way that

provides glitchless gating of the Q

and /Q

outputs. When

the /EN signal is LOW, the input is passed to the outputs and

the data output equals the data input. When the data input is

HIGH and the /EN goes HIGH, it will force the Q

LOW and

the /Q

HIGH on the next negative transition of the data

input. If the data input is LOW when the /EN goes HIGH, the

next data transition to a HIGH is ignored and Q

remains

LOW and /Q

remains HIGH. The next positive transition of

the data input is not passed on to the data outputs under these

conditions. The Q

and /Q

outputs remain in their dis-

abled state as long as the /EN input is held HIGH. The /EN

input has no influence on the /Q output and the data input is

passed on (inverted) to this output whether /EN is HIGH or

LOW. This configuration is ideal for crystal oscillator applica-

tions, where the oscillator can be free running and gated on

and off synchronously without adding extra counts to the

output.

The SY10/100EL16VD provides the flexibility of all the

combinations in DIE form, in 16-pin 150mil SOIC package or

in 10-pin MSOP package. The 16-pin SOIC and 10-pin MSOP

packages are ideal for prototyping DIE applications.

The SY10/100EL16VE are similar to the SY10/100EL16VB

where the Q, /Q output is made available differently. In this

package option, V

is no longer provided.

The SY10/100EL16VF are similar to the SY10/100EL16VC,

offering the D, /D inputs rather than the V

output.

M9999-052108

hbwhelp@micrel.com or (408) 955-1690

Rev.: Q

Amendment: /0

Issue Date: May 2008

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