PA7540SI-15 datasheet, PDF - EEWORLD Datasheet

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PA7540SI-15: DescriptionPA7540 PEEL Array? Programmable Electrically Erasable Logic Array; CategoryProgrammable logic devices Programmable logic; File Size236KB，10 Pages; ManufacturerAnachip; Websitehttp://www.anachip.com/

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PA7540SI-15 Overview

PA7540 PEEL Array? Programmable Electrically Erasable Logic Array

PA7540SI-15 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Anachip
Reach Compliance Code	unknow

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PA7540 PEEL Array™

Programmable Electrically Erasable Logic Array

Most Powerful 24-pin PLD Available

- 20 I/Os, 2 inputs/clocks, 40 registers/latches

- 40 logic cell output functions

- PLA structure with true product-term sharing

- Logic functions and registers can be I/O-buried

Ideal for Combinatorial, Synchronous and

Asynchronous Logic Applications

- Integration of multiple PLDs and random logic

- Buried counters, complex state-machines

- Comparators, decoders, multiplexers and other wide-

gate functions

High-Speed Commercial and Industrial Versions

- As fast as 10ns/15ns (tpdi/tpdx), 71.4MHz (f

MAX

)

- Industrial grade available for 4.5 to 5.5V V

and

-40 to +85 °C temperatures

CMOS Electrically Erasable Technology

- Reprogrammable in 24-pin DIP, SOIC and

28-pin PLCC packages

- Optional JN package for 22V10 power/ground

compatibility

Flexible Logic Cell

- 2 output functions per logic cell

- D,T and JK registers with special features

- Independent or global clocks, resets, presets,

clock polarity and output enables

- Sum-of-products logic for output enables

Development and Programmer Support

- Anachip’s WinPLACE Development Software

- Fitters for ABEL, CUPL and other software

- Programming support by popular third-party

programmers

presets, clock polarity, and other features, making the

PA7540 suitable for a variety of combinatorial,

synchronous and asynchronous logic applications. With pin

compatibility and super-set functionality to most 24-pin

PLDs, (22V10, EP610/630, GAL6002), the PA7540 can

implement designs that exceed the architectures of such

devices. The PA7540 supports speeds as fast as

10ns/15ns (tpdi/tpdx) and 71.46MHz (f

MAX

) at moderate

power consumption 80mA (55mA typical). Packaging

includes 24-pin DIP, SOIC and 28-pin PLCC (see Figure

1). Anachip and popular third-party development tool

manufacturers provide development and programming

support for the PA7540.

General Description

The PA7540 is a member of the Programmable Electrically

Erasable Logic (PEEL™) Array family based on ICT’s

CMOS EEPROM technology. PEEL™ Arrays free

designers from the limitations of ordinary PLDs by

providing the architectural flexibility and speed needed for

today’s programmable logic designs. The PA7540 is by far

the most powerful 24-pin PLD available today with 20 I/O

pins, 2 input/global-clocks and 40 registers/latches (20

buried logic cells and 20 I/O registers/latches). Its logic

array implements 84 sum-of-products logic functions. The

PA7540’s logic and I/O cells (LCCs, IOCs) are extremely

flexible offering two output functions per cell (a total of 40

for all 20 logic cells). Logic cells are configurable as D, T,

and JK registers with independent or global clocks, resets,

Figure 1. Pin Configuration

I/C LK1

I/O

GND

VC C

I/O

I/C LK2

I/C LK1

I/O

GND

VC C

I/O

I/C LK2

Figure 2. Block Diagram

2 Input/

G lobal C lock P ins

G lobal

C ells

84 (42X2)

A rray Inputs

true and

com plem ent

B uried

logic

Logic functions

to I/O cells

I/C L K 1

I/O

G lo b a l C e lls

I/O C e lls

VC C

I/O

L o g ic

Arr ay

I/O

C ells

(IO C )

20 I/O P ins

SO IC

I/CLK1

Logic

C ontrol

C ells

(LC C )

I/CLK1

DIP

I/O

L o g ic C o n tro l C e lls

I/O

G ND

VCC

I/O

28 27 26

I/O

1 28 27 26

PA7540

I/C L K 2

4 sum term s

4 product term s

for G lobal C ells

80 sum term s

(four per LC C )

20 Logic C ontrol Cells

2 output functions per cell

(40 total output functions possible)

0 8 -1 4 -0 02 A

1 2 1 3 1 4 1 5 1 6 1 71 8

12 13 14 15 16 17 18

GND

I/CLK2

I/O

PLCC -J

I/O

PLCC -JN

08-14-001B

04-02-051B

PA7540SI-15 Related Products

	PA7540SI-15	PA7540S-15	PA7540
Description	PA7540 PEEL Array? Programmable Electrically Erasable Logic Array	PA7540 PEEL Array? Programmable Electrically Erasable Logic Array	PA7540 PEEL Array? Programmable Electrically Erasable Logic Array
Is it Rohs certified?	incompatible	incompatible	-
Maker	Anachip	Anachip	-
Reach Compliance Code	unknow	unknow	-

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