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54F114SDM

Description
J-K Flip-Flop, F/FAST Series, 1-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, CDIP14, SLIM, CERAMIC, DIP-14
Categorylogic    logic   
File Size63KB,3 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric View All

54F114SDM Overview

J-K Flip-Flop, F/FAST Series, 1-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, CDIP14, SLIM, CERAMIC, DIP-14

54F114SDM Parametric

Parameter NameAttribute value
MakerFairchild
Parts packaging codeDIP
package instructionDIP,
Contacts14
Reach Compliance Codeunknown
Other featuresWITH INDIVIDUAL SET INPUTS
seriesF/FAST
JESD-30 codeR-CDIP-T14
Logic integrated circuit typeJ-K FLIP-FLOP
Number of digits2
Number of functions1
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityCOMPLEMENTARY
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
propagation delay (tpd)7.5 ns
Certification statusNot Qualified
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyTTL
Temperature levelMILITARY
Terminal formTHROUGH-HOLE
Terminal locationDUAL
Trigger typeNEGATIVE EDGE
minfmax125 MHz
Base Number Matches1
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