P87C251SP16 datasheet, PDF - EEWORLD Datasheet

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P87C251SP16: Description8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PDIP40; CategoryThe embedded processor and controller Microcontrollers and processors; File Size177KB，35 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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P87C251SP16 Overview

8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PDIP40

P87C251SP16 Parametric

Parameter Name	Attribute value
Maker	Intel
Parts packaging code	DIP
package instruction	PLASTIC, DIP-40
Contacts	40
Reach Compliance Code	unknown
Has ADC	NO
Address bus width	18
bit size	8
CPU series	80251
maximum clock frequency	16 MHz
DAC channel	NO
DMA channel	NO
External data bus width	8
JESD-30 code	R-PDIP-T40
length	52.26 mm
Number of I/O lines	32
Number of terminals	40
Maximum operating temperature	70 °C
Minimum operating temperature
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP40,.6
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Certification status	Not Qualified
RAM (bytes)	512
rom(word)	8192
ROM programmability	OTPROM
Maximum seat height	5.08 mm
speed	16 MHz
Maximum slew rate	80 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	15.24 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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PRELIMINARY

8XC251SA/SB/SP/SQ

HIGH-PERFORMANCE

CHMOS MICROCONTROLLER

Commercial/Express

Real-time and Programmed Wait State

Bus Operation

Binary-code Compatible with MCS

Pin Compatible with 44-pin PLCC and 40-

pin PDIP MCS 51 Sockets

251 Architecture

— 40-byte Register File

— Registers Accessible as Bytes, Words,

or Double Words

Enriched MCS 51 Instruction Set

— 16-bit and 32-bit Arithmetic and Logic

Instructions

— Compare and Conditional Jump

Instructions

— Expanded Set of Move Instructions

Linear Addressing

256-Kbyte Expanded External Code/Data

Memory Space

ROM/OTPROM/EPROM Options:

16 Kbytes (SB/SQ), 8 Kbytes (SA/SP), or

without ROM/OTPROM/EPROM

16-bit Internal Code Fetch

64-Kbyte Extended Stack Space

On-chip Data RAM Options:

1-Kbyte (SA/SB) or 512-Byte (SP/SQ)

8-bit, 2-clock External Code Fetch in

Page Mode

Fast MCS 251 Instruction Pipeline

User-selectable Configurations:

— External Wait States (0-3 wait states)

— Address Range & Memory Mapping

— Page Mode

32 Programmable I/O Lines

Seven Maskable Interrupt Sources

with Four Programmable Priority

Levels

Three Flexible 16-bit Timer/counters

Hardware Watchdog Timer

Programmable Counter Array

— High-speed Output

— Compare/Capture Operation

— Pulse Width Modulator

— Watchdog Timer

Programmable Serial I/O Port

— Framing Error Detection

— Automatic Address Recognition

High-performance CHMOS Technology

Static Standby to 16-MHz Operation

Complete System Development

Support

— Compatible with Existing Tools

— New MCS 251 Tools Available:

Compiler, Assembler, Debugger, ICE

Package Options (PDIP, PLCC, and

Ceramic DIP)

A member of the Intel family of 8-bit MCS 251 microcontrollers, the 8XC251SA/SB/SP/SQ is binary-code

compatible with MCS 51 microcontrollers and pin compatible with 40-pin PDIP and 44-pin PLCC MCS 51

microcontrollers. MCS 251 microcontrollers feature an enriched instruction set, linear addressing, and

efficient C-language support. The 8XC251SA/SB/SP/SQ has 512 bytes or 1 Kbyte of on-chip RAM and is

available with 8 Kbytes or 16 Kbytes of on-chip ROM/OTPROM/EPROM, or without ROM/OTPROM/EPROM.

A variety of features can be selected by new user-programmable configurations.

May 1996

Order Number:

272783-003

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