Ultra high Q/ low ESR Multilayer
Ceramic Chip Capacitors
RoHS
UQ
Series
MERITEK
F
EATURES
x
High Q and low ESR performance at high frequency
x
Ultra low capacitance to 0.1pF
x
Can offer high precision tolerance to ±0.05pF
A
PPLICATIONS
x
Telecommunication products & equipments: mobile phone,
x
x
WLAN and base station
RF module: power amplifier, VCO
Tuners
D
ESCRIPTION
MLCC consists of a conducting material and electrodes.
To manufacture a chip-type SMT and achieve
miniaturization, high density and high efficiency, ceramic
condensers are used.
MERITEK
UQ series MLCC is used at high frequencies
generally have a small temperature coefficient of
capacitance, typical within the ±30ppm/ºC required for
NPO (COG) classification and have excellent
conductivity internal electrode. Thus,
MERITEK
UQ
series MLCC will be with the feature of low ESR and high
Q characteristics
P
ART
N
UMBER
S
YSTEM
UQ 05 N 104 J 101 C 7
Meritek Series
Dimension
Code
Size
Code
01
0201
02
0402
03
0603
05
0805
Packaging
Code
7
7" reeled
D
13" reeled
Dielectric
N
NPO(COG)
Termination -
C: Cu/Ni/Sn
Rated Voltage:
2 significant digits + number of zeros
Code
6R3
6.3V
DC
101
100V
DC
Tolerance
±0.05pF
±0.1pF
±0.25pF
100
10V
DC
251
250V
DC
Code
D
F
250
25V
DC
501
500V
DC
Tolerance
±0.5pF
±1%
500
50V
DC
Capacitance
(unit: pF)
First 2 digits are significant 3rd digit is multiplier.
"R" indicates decimal for values below 10pF
Code
pF
nF
uF
8R2
8.2
--
--
101
100
0.1
--
223
22000
22
0.022
104
100000
100
0.1
Capacitance Tolerance
Code
A
B
C
Code
G
J
Tolerance
±2%
±5%
G
ENERAL
I
NFORMATION
Item
Dielectric
Size
Capacitance range*
Capacitance tolerance
NPO
0201, 0402, 0603, 0805
0201:
0.1pF~33pF,
0402:
0.1pF~22pF,
0603:
0.3pF~47pF,
0805:
0.3pF~100pF
Cap≤5pF:
A(±0.05pF), B(±0.1pF),C(±0.25pF)
5pF<Cap<10pF:
B(±0.1pF), C(±0.25pF), D(±0.5pF)
Cap≥10pF:
F(±1%), G(±2%), J(±5%)
6.3V, 10V, 25V, 50V, 100V, 250V, 500V
Cap≥30pF,
Q≥1000,
Cap<30pF,
Q≥400+20C
≥10GΩ
-55qC to +125qC
±30ppm/ºC;
0201: Cap≥22pF,
±60ppm/ºC
Characteristic
Rated voltage (WVDC)
Q*
Insulation resistance at Ur
Operating temperature
Capacitance characteristic
Termination
Ni/Sn (lead-free termination)
*Measured at the conditions of 25ºC ambient temperature and 30%~70%, related humidity
Apply 1.0±0.2V
rms
,1.0MHz±10% for Cap≤1000pF and 1.0±0.2V
rms
, 1.0kHz±10% for Cap>1000pF
Ultra high Q/ low ESR Multilayer
Ceramic Chip Capacitors
RoHS
UQ
Series
MERITEK
UQ0201, NP0, 25V
30
UQ0402, NP0, 50V
25
25
Self resonance frequency (GHz)
Self resonance frequency (GHz)
Measured data (<8.5GHz)
Simulation data
Measured data (<8.5GHz)
Simulation data
20
20
15
15
10
10
5
5
0
0.1
1
10
100
0
0.1
1
10
100
Capacitance (pF)
Capacitance (pF)
Fig. 5 Self resonance frequency vs. Capacitance (0201 size)
Fig. 6 Self resonance frequency vs. Capacitance (0402 size)
UQ0201, N P0, 25 V C om parison
0
0.5pF
-20
- 20
0
U Q 0 4 0 2 , N P 0, 50 V C om p a riso n
0.5pF
S11 (dB)
1 pF
-60
2 pF
S11 (dB)
-40
- 40
- 60
2p F
1 pF
-80
- 80
-100
0.1
1
10
-1 00
0.1
1
10
Frequen cy (G H z )
Fre quenc y (G H z)
Fig. 7
S11 vs. frequency. (0201 size)
Fig. 8
S11 vs. frequency. (0402 size)
U Q 0 2 0 1 , N P 0, 25 V C om p a riso n
0
2 pF
-20
1 pF
0 .5pF
U Q 0 4 0 2, N P0, 50V C om parison
0
2 pF
-20
1p F
0.5p F
-60
S21 (dB)
0 .1
1
10
S21 (dB)
-40
-40
-60
-80
-80
-100
-100
0.1
1
10
F re qu e n cy (G H z )
F re qu e n cy (G H z )
Fig. 9
S21 vs. frequency. (0201 size)
Fig. 10
S21 vs. frequency. (0402 size)
Ultra high Q/ low ESR Multilayer
Ceramic Chip Capacitors
RoHS
UQ
Series
MERITEK
R
ELIABILITY
Item
Visual and Mechanical
Requirements
--
No remarkable defect
Dimensions to confirm to individual
specification sheet
Capacitance &
1.0±0.2Vrms, 1MHz±10%, @ 25ºC ambient temperature Shall not exceed the limits given in the
Q/D.F. (dissipation factor)
detailed specification.
Cap≥30pF: Q≥1000,
Cap<30pF:
Q≥400+20C.
ESR
ESR should be measured at room temperature and
tested at frequency 1.0±0.1GHz.
0201,0402
0603
0.5pF≤Cap≤1pF:<350mΩ 0.3pF≤Cap≤1pF:<1500mΩ
1pF<Cap≤5pF:<300mΩ 1pF<Cap≤10pF:<250mΩ
5pF<Cap≤22pF:<250mΩ 10pF<Cap≤47pF:<200mΩ
Conditions
Dielectric strength
Insulation resistance
Temperature coefficient
Adhesive strength of
termination
To apply voltage -
UR≤100V, ≥250% of rated voltage
UR=250V, ≥200% of rated voltage
Duration: 1 to 5 seconds
Charge and discharge current less than 50mA
To apply rated voltage for 120seconds (max.)
With no electrical load
Operating temperature: -55ºC~+125ºC at 25ºC
Pressurizing force -
0201:2N
0402&0603:5N
>0603:10N
Test time: 10.0±1.0seconds
Vibration frequency: 10~55Hz/minute
Total amplitude: 1.5mm
Duration : 6 hours ( two hours each in three mutually
perpendicular directions)
Solder temperature: 235±5ºC
Dipping time: 2.0±0.5seconds
The middle part of substrate shall be pressurized by
means of the pressurizing rod at a rate of about 1 mm
per second until the deflection becomes 1mm and then
the pressure shall be maintained for 5.0±1.0seconds.
Measurement to be made after keeping at room
temperature for 24±2 hours.
Solder temperature: 270±5ºC
Dipping time: 10±1.0seconds
Preheating: 120ºC~150ºC for 1 minute before immerse
the capacitor in a eutectic solder.
Measurement to be made after keeping at room
temperature for 24±2hours.
Conduct the five cycles according to the temperatures
and duration
Step
Temperature(ºC)
Duration (minute)
1 mini operating temp +0/-3
30±3
2 room temperature
2~3
3 max operating temp +3/-0
30±3
4 room temperature
2~3
Measurement to be made after keeping at room
temperature for 24±2hours
Test temperature: 40ºC±2ºC
Humidity: 90~95% R.H.
+24
Test time: 500 -0 hours
Measurement to be made after keeping at room
temperature for 24±2hours
Test temperature: 40ºC±2ºC
Humidity: 90~95% R.H.
+24
Test time: 500 -0 hours
No evidence of damage or flash over
during test
≥10GΩ
Capacitance change: within ±30ppm/ºC
No remarkable damage or removal of the
terminations
Vibration resistance
No remarkable damage
Cap change and Q/D.F.: to meet initial
specification.
95% min. coverage of all metalized area
No remarkable damage
Cap change within ±5.0% or ±0.5pF
whichever is larger.
(This capacitance change means the
change of capacitance under specified
flexure of substrate from the capacitance
measured before the test)
No remarkable damage
Cap change within ±2.5% or ±0.25pF
whichever is larger.
Q/D.F., I.R. and dielectric strength, to meet
initial requirements.
25% max. leaching on each edge
No remarkable damage
Cap change within ±2.5% or ±0.25pF
whichever is larger.
Q/D.F., I.R. and dielectric strength, to meet
initial requirements.
Solderability
Bending test
Resistance to soldering
heat
Temperature cycle
Humidity (damp heat)
steady state
Humidity (damp heat)
load
No remarkable damage
Cap change within ±5.0% or ±0.5pF
whichever is larger.
Q/D.F.value:
Cap≥30pF: Q≥350
10pF≤Cap<30pF: Q≥275+2.5C
Cap<10pF: Q≥200+10C
IR≥1GΩ
No remarkable damage
Cap change within ±7.5% or ±0.75pF
whichever is larger.
Q/D.F.value: Cap≥30pF: Q≥200
FPGA/CPLD
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