Digital Output Ground Voltage (OGND) ....... –0.3V to 1V
Analog Input Voltage (Note 3) ..... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage .................... –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ............... –0.3V to (OV
DD
+ 0.3V)
PACKAGE/ORDER I FOR ATIO
TOP VIEW
64 GND
63 V
DD
62 V
DD
61 GND
60 V
CM
59 SENSE
58 MODE
57 LVDS
56 OF
+
/OFA
55 OF
–
/DA11
54 D11
+
/DA10
53 D11
–
/DA9
52 D10
+
/DA8
51 D10
–
/DA7
50 OGND
49 OV
DD
A
IN+
1
A
IN+
2
A
IN–
3
A
IN–
4
REFHA 5
REFHA 6
REFLB 7
REFLB 8
REFHB 9
REFHB 10
REFLA 11
REFLA 12
V
DD
13
V
DD
14
V
DD
15
GND 16
65
48 D9
+
/DA6
47 D9
–
/DA5
46 D8
+
/DA4
45 D8
–
/DA3
44 D7
+
/DA2
43 D7
–
/DA1
42 OV
DD
41 OGND
40 D6
+
/DA0
39 D6
–
/CLKOUTA
38 D5
+
/CLKOUTB
37 D5
–
/OFB
36 CLKOUT
+
/DB11
35 CLKOUT
–
/DB10
34 OV
DD
33 OGND
UP PACKAGE
64-LEAD (9mm
×
9mm) PLASTIC QFN
EXPOSED PAD (PIN 65) IS GND, MUST BE SOLDERED TO PCB
T
JMAX
= 150°C,
θ
JA
= 20°C/W
ENC
+
17
ENC
–
18
SHDN 19
OE 20
DO
–
/DB0 21
DO
+
/DB1 22
D1
–
/DB2 23
D1
+
/DB3 24
OGND 25
OV
DD
26
D2
–
/DB4 27
D2
+
/DB5 28
D3
–
/DB6 29
D3
+
/DB7 30
D4
–
/DB8 31
D4
+
/DB9 32
*The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges.
CO VERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Transition Noise
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
●
Differential Analog Input (Note 5)
Differential Analog Input
(Note 6)
External Reference
Internal Reference
External Reference
SENSE = 1V
2
U
U
W
W W
U
W
OV
DD
= V
DD
(Notes 1, 2)
Power Dissipation............................................ 1500mW
Operating Temperature Range
LTC2242C-12 .......................................... 0°C to 70°C
LTC2242I-12 .......................................–40°C to 85°C
Storage Temperature Range ..................–65°C to 150°C
ORDER PART
NUMBER
LTC2242CUP-12
LTC2242IUP-12
UP PART
MARKING*
LTC2242UP-12
LTC2242UP-12
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
U
MIN
12
–2.7
–1
–17
–3.2
●
●
●
●
TYP
±1
±0.4
±5
±0.7
±10
±60
±45
0.74
MAX
2.7
1
17
3.2
UNITS
Bits
LSB
LSB
mV
%FS
µV/C
ppm/C
ppm/C
LSB
RMS
224212f
LTC2242-12
A ALOG I PUT
SYMBOL
V
IN
V
IN, CM
I
IN
I
SENSE
I
MODE
I
LVDS
t
AP
t
JITTER
PARAMETER
The
●
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
2.375V < V
DD
< 2.625V (Note 7)
Differential Input (Note 7)
0 < A
IN+
, A
IN–
< V
DD
0V < SENSE < 1V
●
●
●
●
Analog Input Range (A
IN+
– A
IN–
)
Analog Input Common Mode (A
IN+
+ A
IN–
)/2
Analog Input Leakage Current
SENSE Input Leakage
MODE Pin Pull-Down Current to GND
LVDS Pin Pull-Down Current to GND
Sample and Hold Acquisition Delay Time
Sample and Hold Acquisition Delay Time Jitter
Full Power Bandwidth
DY A IC ACCURACY
SYMBOL
SNR
PARAMETER
The
●
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 4)
CONDITIONS
10MHz Input
70MHz Input
140MHz Input
240MHz Input
SFDR
Spurious Free Dynamic Range
2nd or 3rd Harmonic
(Note 11)
10MHz Input
70MHz Input
140MHz Input
240MHz Input
Spurious Free Dynamic Range
4th Harmonic or Higher
(Note 11)
10MHz Input
70MHz Input
140MHz Input
240MHz Input
S/(N+D)
Signal-to-Noise Plus
Distortion Ratio
(Note 12)
10MHz Input
70MHz Input
140MHz Input
240MHz Input
IMD
Intermodulation Distortion
f
IN1
= 135MHz, f
IN2
= 140MHz
●
●
●
●
Signal-to-Noise Ratio (Note 10)
U
W U
U
MIN
1.2
–1
–1
TYP
±0.5
to
±1
1.25
MAX
1.3
1
1
UNITS
V
V
µA
µA
µA
µA
ns
fs
RMS
MHz
7
7
0.4
95
Figure 8 Test Circuit
1200
MIN
63.4
TYP
65.4
65.3
65.3
65.1
78
MAX
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBc
65
75
74
73
87
73
87
87
87
65.3
61.8
65.1
64.8
64.5
81
224212f
3
LTC2242-12
I TER AL REFERE CE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Tempco
V
CM
Line Regulation
V
CM
Output Resistance
2.375V < V
DD
< 2.625V
–1mA < I
OUT
< 1mA
CONDITIONS
I
OUT
= 0
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
ID
V
ICM
R
IN
C
IN
V
IH
V
IL
I
IN
C
IN
OV
DD
= 2.5V
C
OZ
I
SOURCE
I
SINK
V
OH
V
OL
OV
DD
= 1.8V
V
OH
V
OL
V
OD
V
OS
High Level Output Voltage
Low Level Output Voltage
Differential Output Voltage
Output Common Mode Voltage
I
O
= –500µA
I
O
= 500µA
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
High Level Output Voltage
Low Level Output Voltage
OE = High (Note 7)
V
OUT
= 0V
V
OUT
= 2.5V
I
O
= –10µA
I
O
= –500µA
I
O
= 10µA
I
O
= 500µA
PARAMETER
Differential Input Voltage
Common Mode Input Voltage
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
(Note 7)
V
DD
= 2.5V
V
DD
= 2.5V
V
IN
= 0V to V
DD
(Note 7)
CONDITIONS
(Note 7)
Internally Set
Externally Set (Note 7)
ENCODE INPUTS (ENC
+
, ENC
–
)
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
MIN
●
●
LOGIC INPUTS (OE, SHDN)
●
●
●
LOGIC OUTPUTS (CMOS MODE)
3
37
23
2.495
2.45
0.005
0.07
1.75
0.07
●
●
LOGIC OUTPUTS (LVDS MODE)
100Ω Differential Load
100Ω Differential Load
247
1.125
350
1.250
454
1.375
mV
V
4
U
U
U
U
U
(Note 4)
MIN
1.225
TYP
1.25
±35
3
2
MAX
1.275
UNITS
V
ppm/°C
mV/V
Ω
TYP
MAX
UNITS
V
0.2
1.2
1.5
1.5
4.8
2
1.7
0.7
–10
3
10
2.0
V
V
kΩ
pF
V
V
µA
pF
pF
mA
mA
V
V
V
V
V
V
224212f
LTC2242-12
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 9)
SYMBOL
V
DD
P
SLEEP
P
NAP
OV
DD
I
VDD
I
OVDD
P
DISS
OV
DD
I
VDD
P
DISS
PARAMETER
Analog Supply Voltage
Sleep Mode Power
Nap Mode Power
Output Supply Voltage
Analog Supply Current
Output Supply Current
Power Dissipation
Output Supply Voltage
Analog Supply Current
Power Dissipation
(Note 8)
(Note 7)
CONDITIONS
(Note 8)
SHDN = High, OE = High, No CLK
SHDN = High, OE = Low, No CLK
(Note 8)
●
●
●
●
●
●
●
POWER REQUIRE E TS
LVDS OUTPUT MODE
2.375
2.5
285
58
858
0.5
2.5
285
740
2.625
320
70
975
2.625
320
V
mA
mA
mW
V
mA
mW
CMOS OUTPUT MODE
The
●
denotes the specifications which apply over the full operating temperature
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