YDA131 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > YDA131

Preview

YDA131: DescriptionD- 1 stereo 2.5W digital audio power amplifier; File Size1MB，18 Pages; ManufacturerYAMAHA CORPORATION; Websitehttp://device.yamaha.com/

Download Datasheet View All

YDA131 Overview

D- 1 stereo 2.5W digital audio power amplifier

Preview

Download Datasheet

View All

YDA131

D- 1

STEREO 2.5W DIGITAL AUDIO POWER AMPLIFIER

■Outline

The YDA131 is the high efficient digital audio power amplifier IC that operates on a single 5V power supply.

This IC is capable of providing output power of 2.5W/channel, which is at the highest level as a device on a single 5V

power supply. By adopting Yamaha's proprietary modulation system, the device provides low distortion and high signal

to noise ratio at the highest level among digital amplifiers in the equivalent class.

This IC accepts analog signal, converts it into digital pulse by the digital modulation circuitry and outputs the signal from

the large current capacity buffers. The digital pulse signal that is outputted from the output buffer is converted into audio

signal through an external low pass filter, and sent to the speakers.

This IC has the overcurrent detection function that detects short-circuiting of speaker terminal end and the high

temperature detection function that detects abnormal high temperature.

With the overcurrent detection function, this IC generates a warning signal when the current that flows in the output

buffers of left and right channels exceeds a fixed value. With the high temperature detection function, this IC generates a

warning signal when the junction temperature becomes abnormal.

Furthermore, this IC builds in function that mute an audio output and shut off all functions of the IC. By this function,

power consumption is restrained at the minimum.

■Features

・High

output power

2.5 W @ VDD=5.0V, 4Ω (THD+N<10%)

・High

efficiency operation

85 % @ VDD=5.0V, R

=8Ω

75 % @ VDD=5.0V, R

=4Ω

・Low

distortion(THD+N)

0.018 % @ Po=1.0W, 1kHz, R

=4Ω

・High

signal to noise ratio

103dB @ VDD=5.0V, Input sensitivity =1.0V, R

=4Ω

97dB @ VDD=5.0V, Input sensitivity=150mV, R

=4Ω

・Low

consumption current

14.0 mA @ VDD=5.0V, no signal(no filter)

7.0 mA @ VDD=5.0V, at mute

1 µA

@ VDD=5.0V, at sleep

・Channel

separation

80dB @ 1kHz

・Any

gain setting by external resistor

・Any

setting of starting time by VREF capacitor

・Sleep

function by SLEEP terminal

・Output

mute function by MUTE terminal

・Over

current detection function of speaker terminal end (Ground short-circuiting, Load short-circuiting)

・High

temperature detection function

・Pop

noise suppression function at turn-on and turn-off

・Analog

input/BTL(Bridge-Tied Load)output

・24-pin

plastic SSOP

Pin lead plating with Pd free (YDA13１-EZ)

YDA131 CATALOG

CATALOG No.:LSI-4DA131A40

2004.12

YDA131

■Description

of terminal functions

VDDPL, VSSPL, VDDPR, VSSPR (Pin No.22, 20&23, 15, 14&17)

These are the power supply and ground terminals for the output buffers.

VDDPL and VSSPL are the power supply and ground terminals for the left channel, and VDDPR and VSSPR are the power

supply and ground terminals for the right channel.

There are two VSSPL terminals and two VSSPR terminals, both of which are to be connected with similar impedance

(length of patterns on the printed circuit board).

OUTPL, OUTML, OUTPR, OUTMR (Pin No.19, 21, 18, 16) [Digital-OUT]

These are the output buffer terminals and output digital pulse signal that has been modulated by PWM system.

OUTPL and OUTML are the output buffer terminals for the left channel, OUTPL is the positive terminal and OUTML is

the negative terminal.

OUTPR and OUTMR are the output buffer terminals for the right channel, OUTPR is the positive terminal and OUTMR is

the negative terminal.

Since both channels are BTL (Bridge-Tied Load) output, the minus terminal is not at the ground potential.

Connect the IC with the speakers through an LC filter as shown in the "Application circuit" for the purpose of removing the

carrier frequency signal.

VDDL, VSSL, VDDR, VSSR (Pin No.5, 4, 8, 9)

These are the power supply and ground terminals for the circuitries other than the output buffers.

VDDL and VSSL are the power supply and ground terminals for the left channel circuit.

VDDR and VSSR are the power supply and ground terminals for the right channel circuit.

VSS (Pin No.6)

This is the ground terminal for the protection circuitry and the control circuitry.

Connect VSS to the left-channel analog ground near the terminal.

INL, VPL, INR, VPR (Pin No.2, 1, 11, 12) [Analog]

These are the audio signal input and gain adjustment terminals.

INL and VPL are the audio signal input and gain adjustment terminals for the left channel.

INR and VPR are the audio signal input and gain adjustment terminals for the right channel.

The terminals are connected respectively to the inversion input and output of the first stage inversion operational amplifiers.

The amplifier gain is set by connecting an input resistor and a feedback resistor to both terminals as shown the "Application

circuit". The use of this inversion operational amplifier allows making a simple filter.

For the details, refer to "Gain setting" on page 6.

VREFL, VREFR (Pin No.3, 10) [Analog]

These are reference voltage output terminals.

VREFL is the reference voltage output terminal for the left channel, and VREFR is the reference voltage output terminal for

the right channel. Connect the same capacitors to these terminals. The starting time is set by changing the capacitance

connected to VREFL and VREFR terminals.

For the details, refer to "Pop noise reduction function" on page 9.

SLEEP (Pin No.24) [Digital-IN]

This is the operation shut off control terminal.

The terminal controls both channels at the same time. When SLEEP terminal is set at "H" level, all of the internal circuits

are placed in the shut off state, output is placed in the muted state, and the IC is placed in the sleep state.

At this time the power consumption is minimized, and warning signal (PROT terminal output) is set at "L" level.

When SLEEP terminal is set at "L" level, this IC goes into normal operation after sufficient time (starting time) to make

each reference voltage reaches a fixed potential.

Recommended Resources

Why is EMC rectification difficult? Do you understand?

Circuit 2 for synchronously controlling multiple motors with multiple frequency converters

Low frequency high frequency filter

Bridge pickup type speaker protection circuit (1)

Negative voltage generation circuit using Timer IC555

Starting circuit combining inching and long-term operation

Programs generated with gcc can run on 2440, but programs generated with armlink cannot. Why?: I know armlink is generally used to make plain files. Can it generate a normal exe? It can run under the existing linux, just like the one generated by gcc. Thank you...; zzqbruce ARM Technology

When using NandFlash + Arm7 as a USB flash drive, is it necessary to create a file system on NandFlash?: Just as the title says, thank you!...; houyb ARM Technology

Keithley's Three Newest Series 2600B SourceMeter Instruments: Expanding the SourceMeter Source Measure Unit (SMU) Family of Products Optimized for Benchtop Applications The new features provided by the 2600B Series SourceMeter will effectively improve the effici...; Jack_ma Test/Measurement

Target Design Platform White Paper.pdf: Targeted Design Platform White Paper.pdf For more than twenty-five years, Xilinx has been at the forefront of the programmable logic revolution, inventing and evolving FPGA platform technology. During...; 小志 FPGA/CPLD

FPGA PCI-e x1 development board transfer: I have an official version of the FPGA development board, which has 35,000 LUTs (LEs), 2 Gigabit Ethernet, 128MB of DDR3 SDRAM, a digital tube, N LEDs, an integrated USB burner, and supports PCI-expre...; flzili Buy&Sell

Optimizing Power Consumption in Mobile Multimedia Transport Chains: [font=宋体]Watching time is an extremely important performance indicator in any mobile multimedia device because it represents not only how much energy the battery stores, but also how efficiently the e...; 咖啡不加糖 Energy Infrastructure?

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components