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DDU4C-5500A2

Description
5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU4C)
Categorylogic    logic   
File Size47KB,4 Pages
ManufacturerData Delay Devices
Download Datasheet Parametric View All

DDU4C-5500A2 Overview

5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU4C)

DDU4C-5500A2 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Parts packaging codeSOIC
package instructionSOP, GWDIP14,.4
Contacts14
Reach Compliance Codecompli
Is SamacsysN
JESD-30 codeR-PDSO-G14
JESD-609 codee0
Logic integrated circuit typeACTIVE DELAY LINE
Number of functions1
Number of taps/steps5
Number of terminals14
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeGWDIP14,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
programmable delay lineNO
Prop。Delay @ Nom-Su500 ns
Certification statusNot Qualified
Maximum seat height7.62 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Total delay nominal (td)500 ns
width6.858 mm
Base Number Matches1
DDU4C
5-TAP, HCMOS-INTERFACED
FIXED DELAY LINE
(SERIES DDU4C)
FEATURES
Five equally spaced outputs
Fits standard 8-pin DIP socket
Low profile
Auto-insertable
Input & outputs fully CMOS interfaced & buffered
2
10 T L fan-out capability
IN
1
14
12
T2
T4
GND
4
10
6
7
8
data
3
®
delay
devices,
inc.
PACKAGES
VCC
T1
T3
T5
IN
N/C
N/C
T2
N/C
T4
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VDD
N/C
T1
N/C
T3
N/C
T5
DIP
DDU4C-xx Comm.
DDU4C-xxM Military
SMD
DDU4C-xxA2 Comm.
DDU4C-xxB2 Comm.
DDU4C-xxMC2 Military
FUNCTIONAL DESCRIPTION
The DDU4C-series device is a 5-tap digitally buffered delay line. The
signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an
amount determined by the device dash number (See Table). The total
delay of the line is measured from IN to T5. The nominal tap-to-tap delay
increment is given by one-fifth of the total delay.
PIN DESCRIPTIONS
IN
T1-T5
VDD
GND
Signal Input
Tap Outputs
+5 Volts
Ground
SERIES SPECIFICATIONS
Minimum input pulse width:
20% of total delay
Output rise time:
8ns typical
Supply voltage:
5VDC
±
5%
Supply current:
I
CCL
= 40µa typical
I
CCH
= 10ma typical
Operating temperature:
0° to 70° C
Temp. coefficient of total delay:
300 PPM/°C
DASH NUMBER SPECIFICATIONS
Part
Number
DDU4C-5050
DDU4C-5060
DDU4C-5075
DDU4C-5100
DDU4C-5125
DDU4C-5150
DDU4C-5200
DDU4C-5250
DDU4C-5300
DDU4C-5400
DDU4C-5500
Total
Delay (ns)
50
±
2.5
60
±
3.0
75
±
4.0
100
±
5.0
125
±
6.5
150
±
7.5
200
±
10.0
250
±
12.5
300
±
15.0
400
±
20.0
500
±
25.0
Delay Per
Tap (ns)
10.0
±
3.0
12.0
±
3.0
15.0
±
3.0
20.0
±
3.0
25.0
±
3.0
30.0
±
3.0
40.0
±
4.0
50.0
±
5.0
60.0
±
6.0
80.0
±
8.0
100.0
±
10.0
NOTE: Any dash number between 5050 and 5500
not shown is also available.
20%
20%
20%
20%
20%
VDD IN
T1
T2
T3
T4
T5 GND
DDU4C Functional diagram
©
1997 Data Delay Devices
Doc #97034
12/10/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
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