LVPECL Dual Frequency
Programmable Crystal Oscillator
IDT8N3D085
DATA SHEET
General Description
The IDT8N3D085 is a LVPECL Dual Frequency-Programmable
Crystal Oscillator with very flexible frequency programming
capabilities. The device uses IDT’s fourth generation FemtoClock
®
NG technology for an optimum of high clock frequency and low phase
noise performance. The device accepts 2.5V or 3.3V supply and is
packaged in a small, lead-free (RoHS 6) 6-lead ceramic 5mm x 7mm
x 1.55mm package.
The device can be programmed to any frequency in the range from
15.476MHz to 866.67MHz and from 975MHz to 1,300 MHz and
supports a very high degree of frequency precision of 218Hz or
better. One of two pre-set output frequencies is selected by the
FSEL pin.The extended temperature range supports wireless
infrastructure, telecommunication and networking end equipment
requirements.
Features
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Fourth generation FemtoClock
®
NG technology
Factory-programmable clock output frequency from
15.476MHz to 866.67MHz and from 975MHz to 1,300MHz
Frequency programming resolution is 218Hz and better
One 2.5V or 3.3V LVPECL clock output
Output enable control (positive polarity),
LVCMOS/LVTTL compatible
LVCMOS compatible control inputs
RMS phase jitter @ 156.25MHz (12kHz - 20MHz):
0.24ps (typical), integer PLL feedback configuration
RMS phase jitter @ 156.25MHz (1kHz - 40MHz):
0.27ps (typical), integer PLL feedback configurationally
2.5V or 3.3V supply
-40°C to 85°C ambient operating temperature
Available in a lead-free (RoHS 6) 6-pin ceramic package
Block Diagram
PFD
&
LPF
FemtoClock
®
NG
VCO
1950-2600MHz
Pin Assignment
OE 1
6 VCC
5 nQ
4 Q
OSC
f
REF
2
÷P
÷N
Q
nQ
FSEL 2
VEE 3
÷MINT,
MFRAC
25
FSEL
OE
Pulldown
Pullup
7
IDT8N3D085
6-lead ceramic 5mm x 7mm x 1.55mm
package body
CD Package
Top View
Configuration Register (ROM)
IDT8N3D085CCD
REVISION A DECEMBER 14, 2012
1
©2012 Integrated Device Technology, Inc.
IDT8N3D085 Data Sheet
LVPECL DUAL FREQUENCY PROGRAMMBLE CRYSTAL OSCILLATOR
Pin Description and Characteristic Tables
Table 1. Pin Descriptions
Number
1
2
3
4, 5
6
Name
OE
FSEL
V
EE
Q, nQ
V
CC
Input
Input
Power
Output
Power
Type
Pullup
Pulldown
Description
Output enable pin. See table 3A for function. LVCMOS/LVTTL interface levels.
Frequency select pin. See table 3B for function. LVCMOS/LVTTL interface levels.
Negative supply pin.
Differential clock output pair. LVPECL interface levels.
Power supply pin.
NOTE:
Pullup and pulldown
refer to internal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
R
PULLDOWN
R
PULLUP
Parameter
Input Capacitance
Input Pulldown Resistor
Input Pullup Resistor
Test Conditions
Minimum
Typical
5.5
50
50
Maximum
Units
pF
k
k
Function Tables
Table 3A. OE Configuration
Input
OE
0
1 (default)
Output Enable
Output Q, nQ is in high-impedance state.
Output Q, nQ is enabled.
NOTE: OE is an asynchronous control.
Table 3B. Frequency Selection
Input
FSEL
0 (default)
1
Operation
Frequency 0
Frequency 1
NOTE: Frequency 0 and 1 are factory-programmed by IDT. Any frequency combination within the available
frequency range (see table 3C) can be ordered. For order information, see
FemtoClock NG Ceramic-Package
XO and VCXO Ordering Product Information
document.
Table 3C. Output Frequency Range
15.476MHz to 866.67MHz
975 MHz to 1,300MHz
NOTE: Supported output frequency range. The output frequency can be programmed to any
frequency in this range and to a precision of 218 Hz or better.
IDT8N3D085CCD
REVISION A DECEMBER 14, 2012
2
©2012 Integrated Device Technology, Inc.
IDT8N3D085 Data Sheet
LVPECL DUAL FREQUENCY PROGRAMMBLE CRYSTAL OSCILLATOR
Principles of Operation
The block diagram consists of the internal 3
rd
overtone crystal and
oscillator which provide the reference clock fXTAL of either
114.285MHz or 100MHz. The PLL includes the FemtoClock NG VCO
along with the Pre-divider (P), the feedback divider (M) and the post
divider (N). The P, M, and N dividers determine the output frequency
based on the fXTAL reference. The configuration of the feedback
divider to integer-only values results in an improved output phase
noise characteristics at the expense of the range of output
frequencies. Internal registers are used to hold up to two different
factory pre-set configuration settings. The configuration is selected
via the FSEL pin. Changing the FSEL control results in an immediate
change of the output frequency to the selected register values. The
P, M, and N frequency configurations support an output frequency
range from 15.476MHz to 866.67MHz and from 975MHz to
1,300MHz.
The devices use the fractional feedback divider with a delta-sigma
modulator for noise shaping and robust frequency synthesis
capability. The relatively high reference frequency minimizes phase
noise generated by frequency multiplication and allows more efficient
shaping of noise by the delta-sigma modulator. The output frequency
is determined by the 2-bit pre-divider (P), the feedback divider (M)
and the 7-bit post divider (N). The feedback divider (M) consists of
both a 7-bit integer portion (MINT) and an 18-bit fractional portion
(MFRAC) and provides the means for high-resolution frequency
generation. The output frequency fOUT is calculated by:
1
f OUT
=
f XTAL
------------
MINT
+
MFRAC
+ 0.5
------------------------------------
-
P
N
18
2
Table 3D. Frequency Selection
Input
FSEL
0 (default)
1
Selects
Frequency 0
Frequency 1
Frequency Configuration
An order code is assigned to each frequency configuration and the
VCXO pull-range programmed by the factory (default frequencies).
For more information on the available default frequencies and order
codes, please see the Ordering Information Section in this document.
For available order codes, see the FemtoClock NG Ceramic-Package
XO and VCXO Ordering Product Information document.
For more information on programming capabilities of the device for
custom frequency and pull-range configurations, see the
FemtoClock
NG Ceramic 5x7 Module Programming Guide.
(1)
IDT8N3D085CCD
REVISION A DECEMBER 14, 2012
3
©2012 Integrated Device Technology, Inc.
IDT8N3D085 Data Sheet
LVPECL DUAL FREQUENCY PROGRAMMBLE CRYSTAL OSCILLATOR
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum
Ratings
may cause permanent damage to the device. These ratings
are stress specifications only. Functional operation of product at
these conditions or any conditions beyond those listed in the
DC
Item
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance,
JA
Storage Temperature, T
STG
Characteristics or AC Characteristics
is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect
product reliabilit
y.
Rating
3.63V
-0.5V to V
CC
+ 0.5V
50mA
100mA
49.4C/W (0 mps)
-65C to 150C
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics, V
CC
=
3.3V ± 5%, V
EE
=
0V, T
A
= -40°C to 85°C
Symbol
V
CC
I
EE
Parameter
Power Supply Voltage
Power Supply Current
Test Conditions
Minimum
3.135
Typical
3.3
123
Maximum
3.465
148
Units
V
mA
Table 4B. Power Supply DC Characteristics, V
CC
=
2.5V ± 5%, V
EE
=
0V, T
A
= -40°C to 85°C
Symbol
V
CC
I
EE
Parameter
Power Supply Voltage
Power Supply Current
Test Conditions
Minimum
2.375
Typical
2.5
119
Maximum
2.625
143
Units
V
mA
Table 4C. LVCMOS/LVTTL DC Characteristic, V
CC
= 3.3V ± 5% or 2.5V ± 5%, V
EE
=
0V, T
A
= -40°C to 85°C
Symbol
V
IH
Parameter
Input High Voltage
OE
FSEL
V
IL
Input Low Voltage
OE
FSEL
OE
I
IH
Input High Current
FSEL
OE
I
IL
Input Low Current
FSEL
V
CC
= 2.5V
V
CC
= V
IN
= 3.465V or 2.625V
V
CC
= V
IN
= 3.465V or 2.625V
V
CC
= 3.465V or 2.625V, V
IN
= 0V
V
CC
= 3.465V or 2.625V, V
IN
= 0V
-150
-5
-0.3
-0.3
0.7
0.5
10
150
V
V
µA
µA
µA
µA
V
CC
= 3.3V
Test Conditions
V
CC
= 3.3V
V
CC
= 2.5V
Minimum
2
1.7
-0.3
-0.3
Typical
Maximum
V
CC
+ 0.3
V
CC
+ 0.3
0.8
0.5
Units
V
V
V
V
IDT8N3D085CCD
REVISION A DECEMBER 14, 2012
4
©2012 Integrated Device Technology, Inc.
IDT8N3D085 Data Sheet
LVPECL DUAL FREQUENCY PROGRAMMBLE CRYSTAL OSCILLATOR
Table 4D. LVPECL DC Characteristics, V
CC
= 3.3V ± 5%, V
EE
=
0V, T
A
= -40°C to 85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
– 1.4
V
CC
– 2.0
0.6
Typical
Maximum
V
CC
– 0.8
V
CC
– 1.6
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50
to V
CC
– 2V
Table 4E. LVPECL DC Characteristics, V
CC
= 2.5V ± 5%, V
EE
=
0V, T
A
= -40°C to 85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
– 1.4
V
CC
– 2.0
0.4
Typical
Maximum
V
CC
– 0.8
V
CC
– 1.5
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50
to V
CC
– 2V
IDT8N3D085CCD
REVISION A DECEMBER 14, 2012
5
©2012 Integrated Device Technology, Inc.
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