L1QJ502275JX48 datasheet, PDF - EEWORLD Datasheet

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L1QJ502275JX48: DescriptionCeramic Capacitor, Ceramic,; CategoryPassive components capacitor; File Size7MB，21 Pages; ManufacturerKEMET; Websitehttp://www.kemet.com

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L1QJ502275JX48 Overview

Ceramic Capacitor, Ceramic,

L1QJ502275JX48 Parametric

Parameter Name	Attribute value
Is Samacsys	N
Objectid	7324786759
package instruction	,
Reach Compliance Code	compliant
ECCN code	EAR99
Capacitor type	CERAMIC CAPACITOR
dielectric materials	CERAMIC
Number of terminals	2

L1QJ502275JX48 Preview

Surface Mount and Through-Hole Multilayer Ceramic Chip Stacked Capacitors

KPS MIL Series, SMPS Stacked Capacitors,

MIL–PRF–49470, DSCC 87106, 25 – 1,000 VDC

(Commerical, Military and Space Grades)

Overview

KEMET Power Solutions (KPS) MIL Series ceramic

stacked capacitors are available in commercial, military

and space grades and are well suited for standard and

high reliability switch mode power supply (SMPS) and

pulse energy applications. Qualified under performance

specification MIL–PRF–49470, our military and space

grade products meet or exceed the requirements outlined

by DSCC (Defense Supply Center, Columbus) and are

available in both B (standard reliability) & T (high reliability)

product levels. MIL–PRF–49470 was developed as part

of a cooperative effort between the U.S. Military, NASA

and SMPS suppliers to produce a robust replacement to

cancelled DSCC Drawing 87106.

The KPS MIL Series is constructed using large chip

multilayer ceramic capacitors (MLCCs), horizontally

stacked and secured to a lead-frame termination system

using a high melting point (HMP) solder alloy. The lead frame

isolates the MLCCs from the printed circuit board (PCB) while

establishing a parallel circuit configuration. Mechanically

isolating the capacitors from the PCB improves mechanical

and thermal stress performance, while the parallel circuit

configuration allows for bulk capacitance in the same or

smaller design footprint.

Available in BX, BR, BQ, and X7R dielectrics, these devices are

available in unencapsulated styles in both surface mountable

and through-hole configurations. Their low Equivalent Series

Resistance (ESR) and Equivalent Series Inductance (ESL)

make them ideally suited for input and output filtering

of power supply as well as snubber applications. The

encapsulated styles are primarily used where increased

mechanical and environmental protection is required, such as

in avionics systems.

Benefits

• −55°C to +125°C operating temperature range

• High frequency performance

• Bulk capacitance in a reduced footprint

• MIL–PRF–49470 QPL

• Military Case Codes 3, 4 and 5

• Space Grade available (“T” Level)

• DSCC approved (87106)

• Commercial/Industrial Grade available

• Customer specific requirements available

• Low ESR and ESL

• High thermal stability

• High ripple current capability

• Higher reliability than aluminum electrolytic or tantalum

Applications

• Military

• Space

• Industrial

• Input and output filtering on power supplies – often found

on “capacitor banks“

• Snubber circuits

• Radar filtering (28 V/microwave burst)

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One world. One KEMET

Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com

C1031_KPS_SMPS_49470_STACKS • 4/2/2019

Surface Mount and Through-Hole Multilayer Ceramic Chip Stacked Capacitors – KPS MIL Series, SMPS Stacked Capacitors

MIL–PRF–49470 Ordering Information

M49470

Performance Specification

Indicating MIL-PRF-49470

M49470 = B level

T49470 = T level

A T prefix is used in place of

the M for T level product.

474

Rated

Voltage

(VDC)

A = 50

B = 100

C = 200

E = 500

Lead

Configuration

N = Straight Pin

L = Formed L

J = Formed J

Dielectric

Performance Specification Sheet Number

Capacitance Capacitance

Classification/

Code (pF)

Tolerance

(Indicating MIL-PRF-49470/1)

Characteristic

Q = BQ

R = BR

X = BX

01 = Unencapsulated

Two

significant

digits and

number of

zeros

J = ±5%

K = ±10%

M = ±20%

Indicates performance and reliability requirements. "B" level represents standard reliability."T" level represents high reliability.

Please refer to performance specification sheet MIL–PRF–49470 for details regarding test levels. The latest revision of the specification sheet is

available through DSCC.

1, 3

Test level option "T" is not available on encapsulated stacked devices (i.e. MIL–PRF–49470/2).

Dielectric classification and characteristic details are outlined in the "Electrical Parameters" section of this document.

Lead configuration and dimension details are outlined in the "Dimensions" section of this document.

KPS MIL Series, SMPS Stacks Ordering Information

(Do not use this ordering code if a QPL MIL–SPEC part type is required. Please order using MIL–SPEC ordering code.

Details regarding MIL–PRF–49470 QPL ordering information is outlined above.)

Product Family

L1 = Unencapsulated

106

Testing Option

B = M49470 B level

T = M49470 T level

C = DSCC87106

S = Commercial

X = Non-standard

(Customer specific

requirements)

Maximum Height

Dimension (in.)

Unencapsulated

12 = 0.12"

24 = 0.24"

36 = 0.36"

48 = 0.48"

65 = 0.65"

Encapsulated

27 = 0.27"

39 = 0.39"

53 = 0.53"

66 = 0.66"

80 = 0.80"

Dielectric

Case Size/

Rated

Lead

Capacitance Capacitance

Classification/

Case Code

Voltage

Configuration

Code (pF)

Tolerance

Characteristic

(CC)

(VDC)

Q = BQ

R = BR

X = BX

W = X7R

N = Straight

L = Formed L

J = Formed J

30 = CC 3

40 = CC 4

50 = CC 5

3 = 25

Two

5 = 50

significant

1 = 100

digits and

2 = 200

number of

C = 500

zeros

B = 630

D = 1,000

J = ±5%

K = ±10%

M = ±20%

Test level option "T" is not available on encapsulated stacked devices, i.e., MIL–PRF–49470/2. If a QPL MIL–Spec part type is required, please order

using the MIL–Spec ordering code.

Dielectric classification and characteristic details are outlined in the "Electrical Parameters" section of this document.

Lead configuration and dimension details are outlined in the "Dimensions" section of this document. Additional lead configurations may be available.

Contact KEMET for details.

Indicates performance and reliability requirements. Testing option details are outlined in the "Performance & Reliability" section of this document.

Please refer to performance specification sheet MIL–PRF–49470 for additional details regarding test levels. The latest revision of the specification

sheet is available through DSCC.

DSCC Drawing 87106 was cancelled on 01/03/2005. MIL–PRF–49470 capacitors are preferred over DSCC Drawing 87106 capacitors.

Maximum height dimensions are provided in product tables 1A, 1B, and 1C of this document

1, 4

Ordering Information Requirements per DSCC Drawing 87106

DSCC Drawing 87106 was cancelled on 01/03/2005. Customers can continue to order per 87106 requirements using the original DSCC ordering code,i.e.,

87106–001.

When available, MIL–PRF–49470 devices are preferred over DSCC Drawing 87106. The MIL–PRF–49470 military specification product provides

additional quality assurance provisions that are not required by the DSCC drawing. These extra provisions create a more robust replacement.

Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com

C1031_KPS_SMPS_49470_STACKS • 4/2/2019

Surface Mount and Through-Hole Multilayer Ceramic Chip Stacked Capacitors – KPS MIL Series, SMPS Stacked Capacitors

(M49470/1 & L1) Product Dimensions – Inches (Millimeters)

Case

Code

Lead Spacing Length ±0.010

Width

±0.025 (0.635)

(0.250)

Minimum Maximum

0.450 (11.43)

0.400 (10.16)

0.250 (6.35)

0.500 (12.70)

0.440 (11.18)

0.300 (7.62)

0.950 (24.13) 1.075 (27.30)

Seating Plane

Height

±0.010 (0.250)

Maximum

0.055 (1.40)

Number of

Leads per

Side

Mounting

Technique

Solder reflow

only

Refer to

tables 1A & 1C

0.350 (8.89) 0.425 (10.80)

for specific

maximum A

0.224 (5.69) 0.275 (6.98)

dimension

Only applies to lead style "N" (straight).

1. Unless otherwise specified, tolerances are ±0.010" (0.25 mm).

2. Metric equivalents for C, D and E dimensions are provided for general information only.

3. For maximum B dimension, add 0.065" (1.65 mm) to the appropriate A dimension. For all lead styles, the number of chips is determined by the

capacitance and voltage rating.

4. For case code 5, dimensions shall be 0.100" (2.54 mm) maximum and 0.012” (0.30 mm) minimum.

5. Lead alignment within pin rows shall be within ±0.005" (0.13 mm).

Lead Configurations – Inches (Millimeters)

Lead Style

Symbol

Lead Style

(N) Straight

(L) Formed

(J) Formed

Lead Length

0.250 Minimum (6.35)

0.070±0.010 (1.78±0.25)

Additional lead configurations may be available. Contact KEMET for details.

Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com

C1031_KPS_SMPS_49470_STACKS • 4/2/2019

Surface Mount and Through-Hole Multilayer Ceramic Chip Stacked Capacitors – KPS MIL Series, SMPS Stacked Capacitors

Qualification Inspection Per MIL–PRF–49470

Inspection

Group I

Thermal shock and voltage

conditioning

Visual and mechanical

Inspection

Low temperature storage

Barometric pressure

Terminal strength

Voltage-temperature limits

Vibration, high frequency

Immersion

Shock, specified pulse

Resistance to soldering heat

Moisture resistance

DPA (T level only)

4.8.5

Test Method Paragraph

Group II

4.8.4

Group III

4.8.23

4.8.9

4.8.10

4.8.13.1

4.8.14

4.8.15

4.8.16

4.8.17

4.8.18

4.8.19

Group IV

Group V

Group VI

Group VII

Humidity, steady state, low voltage

4.8.21

(T level only)

Group VIII

Life

4.8.22

Environmental Compliance

These devices do not meet RoHS criteria

Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com

C1031_KPS_SMPS_49470_STACKS • 4/2/2019

Surface Mount and Through-Hole Multilayer Ceramic Chip Stacked Capacitors – KPS MIL Series, SMPS Stacked Capacitors

Electrical Parameters/Performance Characteristics: BQ Dielectric

Item

Operating Temperature Range

Capacitance Change with Reference to

+25°C and 0 VDC Applied (TCC)

Capacitance Change with Reference to

+25°C and 100% Rated VDC Applied

Aging Rate (Maximum % Capacitance Loss/Decade Hour)

Dielectric Withstanding Voltage (DWV)

Dissipation Factor (DF) Maximum Limit at 25ºC

Insulation Resistance (IR) Limit at 25°C

Insulation Resistance (IR) Limit at 125°C

−55°C to +125°C

±15%

+15%, −50%

250% of rated DC voltage for voltage rating < 500 V

150% of rated DC voltage for voltage rating of 500 V

(5±1 seconds and charge/discharge not exceeding 50 mA)

2.5%

1,000 megohm microfarads (minimum) or 100 GΩ

100 megohm microfarads (minimum) or 10 GΩ

Parameters/Characteristics

Regarding aging rate: Capacitance measurements (including tolerance) are indexed to a referee time of 1,000 hours.

To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.

Capacitance and dissipation factor (DF) measured under the following conditions:

1 kHz ±100 Hz at 1.0 Vrms ±0.2 Vrms

Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known

as Automatic Level Control (ALC). The ALC feature should be switched to "ON."

Electrical Parameters/Performance Characteristics: BR Dielectric

Item

Operating Temperature Range

Capacitance Change with Reference to

+25°C and 0 VDC Applied (TCC)

Capacitance Change with Reference to

+25°C and 100% Rated VDC Applied

Aging Rate (Maximum % Capacitance Loss/Decade Hour)

Dielectric Withstanding Voltage (DWV)

Dissipation Factor (DF) Maximum Limit at 25ºC

Insulation Resistance (IR) Limit at 25°C

Insulation Resistance (IR) Limit at 125°C

−55°C to +125°C

±15%

+15%, −40%

250% of rated DC voltage for voltage rating < 500 V

150% of rated DC voltage for voltage rating of 500 V

(5±1 seconds and charge/discharge not exceeding 50 mA)

2.5%

1,000 megohm microfarads (minimum) or 100 GΩ

100 megohm microfarads (minimum) or 10 GΩ

Parameters/Characteristics

Regarding aging rate: Capacitance measurements (including tolerance) are indexed to a referee time of 1,000 hours.

To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.

Capacitance and dissipation factor (DF) measured under the following conditions:

1 kHz ±100 Hz at 1.0 Vrms ±0.2 Vrms

Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known

as Automatic Level Control (ALC). The ALC feature should be switched to "ON."

Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com

C1031_KPS_SMPS_49470_STACKS • 4/2/2019

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