MAX5703/MAX5704/MAX5705
Ultra-Small, Single-Channel, 8-/10-/12-Bit Buffered Output
Voltage DACs with Internal Reference and SPI Interface
General Description
The MAX5703/MAX5704/MAX5705 single-channel, low-
power, 8-/10-/12-bit, voltage-output digital-to-analog
converters (DACs) include output buffers and an internal
reference that is selectable to be 2.048V, 2.500V, or
4.096V. The MAX5703/MAX5704/MAX5705 accept a
wide supply voltage range of 2.7V to 5.5V with extremely
low power (< 1mW) consumption to accommodate most
low-voltage applications. A precision external reference
input allows rail-to-rail operation and presents a 100kI
(typ) load to an external reference.
The MAX5703/MAX5704/MAX5705 have a 50MHz,
3-wire SPI/QSPI™/MICROWIRE®/DSP-compatible serial
interface. The DAC output is buffered and has a low
supply current of 155FA (typical at 3V) and a low offset
error of
Q0.5mV
(typical). On power-up, the MAX5703/
MAX5704/MAX5705 reset the DAC outputs to zero,
providing additional safety for applications that drive
valves or other transducers which need to be off on
power-up. The internal reference is initially powered
down to allow use of an external reference.
The MAX5703/MAX5704/MAX5705 include a user-
configurable active-low asynchronous input,
AUX
for
additional flexibility. This input can be programmed to
asynchronously clear (CLR) or temporarily gate (GATE) the
DAC output to a user-programmable value. A dedicated
active-low asynchronous
LDAC
input is also included. This
allows simultaneous output updates of multiple devices.
The MAX5703/MAX5704/MAX5705 are available in 10-pin
TDFN/µMAX
M
packages and are specified over the -40NC
to +125NC temperature range.
Benefits and Features
S
Single High-Accuracy DAC Channel
12-Bit Accuracy Without Adjustments
±1 LSB INL Buffered Voltage Output
Monotonic Over All Operating Conditions
S
Three Precision Selectable Internal References
2.048V, 2.500V, or 4.096V
S
Internal Output Buffer
Rail-to-Rail Operation with External Reference
6.3µs Settling Time
Output Directly Drives 2kI Loads
S
Small, 10-Pin, 2mm x 3mm TDFN and 3mm x 5mm
µMAX Packages
S
Wide 2.7V to 5.5V Supply Range
S
Flexible 1.8V to 5.5V V
DDIO
S
50MHz, 3-Wire, SPI/QSPI/MICROWIRE/DSP-
Compatible Serial Interface
S
Power-On-Reset to Zero-Scale DAC Output
S
User-Configurable Asynchronous I/O Functions:
CLR, LDAC, GATE
S
Three Software-Selectable Power-Down Output
Impedances: 1kI, 100kI, or High Impedance
S
Low 155µA DAC Supply Current at 3V
Functional Diagram
V
DDIO
V
DD
REF
Applications
Programmable Voltage and Current Sources
Gain and Offset Adjustment
Automatic Tuning and Optical Control
Power Amplifier Control and Biasing
Process Control and Servo Loops
Portable Instrumentation
Data Acquisition
QSPI is a trademark of Motorola, Inc.
MICROWIRE is a registered trademark of National
Semiconductor Corp.
µMAX is a registered trademark of Maxim Integrated Products,
Inc.
INTERNAL REFERENCE /
EXTERNAL BUFFER
CS
SCLK
DIN
AUX
LDAC
SPI
SERIAL
INTERFACE
CODE
CLEAR /
CLEAR /
LOAD GATE
RESET
RESET
POWER
DOWN
CODE
REGISTER
DAC
LATCH
8-/10-/
12-BIT
DAC
MAX5703
MAX5704
MAX5705
BUFFER
OUT
DAC CONTROL LOGIC
POR
100kI 1kI
GND
Ordering Information
appears at end of data sheet.
For related parts and recommended products to use with this part,
refer to:
www.maximintegated.com/MAX5703.related
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-6463; Rev 3; 11/14
MAX5703/MAX5704/MAX5705
Ultra-Small, Single-Channel, 8-/10-/12-Bit Buffered Output
Voltage DACs with Internal Reference and SPI Interface
ABSOLUTE MAXIMUM RATINGS
V
DD
to GND.............................................................-0.3V to +6V
V
DDIO
to GND .........................................................-0.3V to +6V
OUT, REF to GND ........-0.3V to lower of (V
DD
+ 0.3V) and +6V
CS,
SCLK, DIN,
AUX, LDAC
to GND ......................-0.3V to +6V
Continuous Power Dissipation (T
A
= +70NC)
TDFN (derate 14.9mW/NC above +70NC) ...............1188.7mW
µMAX (derate 8.8mW/NC above +70NC) ..................707.3mW
Maximum Continuous Current into Any Pin .................... ±50mA
Operating Temperature Range ........................ -40NC to +125NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TDFN
Junction-to-Ambient Thermal Resistance (θ
JA
) .......67.3NC/W
µMAX
Junction-to-Ambient Thermal Resistance (θ
JA
) .....113.1NC/W
Junction-to-Ambient Thermal Resistance (θ
JC
)...........36NC/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegated.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(V
DD
= 2.7V to 5.5V, V
DDIO
= 1.8V to 5.5V, V
GND
= 0V, C
L
= 200pF, R
L
= 2kI , TA = -40NC to +125NC, unless otherwise noted.)
(Note 2)
PARAMETER
DC PERFORMANCE (Note 3)
MAX5703
Resolution and Monotonicity
N
MAX5704
MAX5705
MAX5703, 8 bits
Integral Nonlinearity (Note 4)
INL
MAX5704, 10 bits
MAX5705, 12 bits
MAX5703, 8 bits
Differential Nonlinearity (Note 4)
Offset Error (Note 5)
Offset Error Drift
Gain Error (Note 5)
Gain Temperature Coefficient
Zero-Scale Error
Full-Scale Error
Maxim Integrated
SYMBOL
CONDITIONS
MIN
8
10
12
-0.25
-0.5
-1
-0.25
-0.5
-1
-5
-1.0
TYP
MAX
UNITS
Bits
±0.05
±0.2
±0. 5
±0.05
±0.1
±0.2
±0.5
±10
±0.1
±2.5
+0.25
+0.5
+1
+0.25
+0.5
+1
+5
+1.0
mV
FV/NC
%FS
ppm of
FS/NC
+10
+0.5
mV
%FS
2
LSB
DNL
OE
GE
MAX5704, 10 bits
MAX5705, 12 bits
LSB
With respect to V
REF
0
With respect to V
REF
-0.5
FPGA/CPLD
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