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570AILF

Description
SOIC-8, Tube
Categorylogic    logic   
File Size236KB,12 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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570AILF Overview

SOIC-8, Tube

570AILF Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeSOIC
package instructionSOP, SOP8,.25
Contacts8
Manufacturer packaging codeDCG8
Reach Compliance Codecompliant
ECCN codeEAR99
series570
Input adjustmentSTANDARD
JESD-30 codeR-PDSO-G8
JESD-609 codee3
length4.9 mm
Logic integrated circuit typePLL BASED CLOCK DRIVER
MaximumI(ol)0.012 A
Humidity sensitivity level1
Number of functions1
Number of inverted outputs
Number of terminals8
Actual output times2
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP8,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.2 ns
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9 mm
minfmax170 MHz
Base Number Matches1
DATASHEET
MULTIPLIER AND ZERO DELAY BUFFER
Description
The ICS570 is a high-performance Zero Delay Buffer (ZDB)
which integrates IDT’s proprietary analog/digital Phase
Locked Loop (PLL) techniques. The A version is
recommended for 5 V designs and the B version for
3.3 V designs. The chip is part of IDT’s ClockBlocks
TM
family, and was designed as a performance upgrade to
meet today’s higher speed and lower voltage requirements.
The zero delay feature means that the rising edge of the
input clock aligns with the rising edges of both output
clocks, giving the appearance of no delay through the
device. There are two outputs on the chip, one being a
low-skew divide by two of the other output. The device
incorporates an all-chip power down/tri-state mode that
stops the internal PLL and puts both outputs into a high
impedance state.
The ICS570 is ideal for synchronizing outputs in a large
variety of systems, from personal computers to data
communications to graphics/video. By allowing off-chip
feedback paths, the device can eliminate the delay through
other devices.
The ICS570 A and B versions were designed to improve
input to output jitter from the original ICS570M version, and
are recommended for all new designs.
ICS570
Features
8-pin SOIC package
Available in Pb (lead) free package
Pin-for-pin replacement and upgrade to ICS570M
Functional equivalent to AV9170 (not a pin-for-pin
replacement)
Low input to output skew of 300 ps max (>60 MHz
outputs)
Ability to choose between 14 different multipliers from
0.5x to 32x
Output clock frequency up to 170 MHz at 3.3 V
Can recover degraded input clock duty cycle
Output clock duty cycle of 45/55
Power Down and Tri-State Mode
Passes spread spectrum clock modulation
Full CMOS clock swings with 25 mA drive capability at
TTL levels
Advanced, low power CMOS process
ICS570B has an operating voltage of 3.3 V (±5%)
ICS570A has an operating voltage of 5.0 V (±5%)
Industrial temperature version available
Block Diagram
IC L K
S 1 :0
F B IN
d ivid e
by N
Phase
D e te c to r,
C h a rg e
Pum p,
and Loop
F ilte r
VCO
/2
C LK
C LK2
E xte rn a l fe e d b a ck ca n co m e fro m C L K o r C L K /2 (se e ta b le o n p a g e 2 )
IDT™ / ICS™
MULTIPLIER AND ZERO DELAY BUFFER
1
ICS570
REV K 073007

570AILF Related Products

570AILF 570BILFT 570BLFT 570ALF 570BILF 570GI-01LF 570ALFT 570GI-01LFT 570AILFT 570BLF
Description SOIC-8, Tube SOIC-8, Reel SOIC-8, Reel SOIC-8, Tube SOIC-8, Tube TSSOP-8, Tube SOIC-8, Reel TSSOP-8, Reel SOIC-8, Reel SOIC-8, Tube
Brand Name Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology
Is it lead-free? Lead free Lead free Lead free Lead free Lead free Lead free Lead free Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to conform to conform to conform to conform to conform to conform to conform to
Parts packaging code SOIC SOIC SOIC SOIC SOIC TSSOP SOIC TSSOP SOIC SOIC
package instruction SOP, SOP8,.25 SOP, SOP8,.25 SOP, SOP8,.25 SOIC-8 SOP, SOP8,.25 3 X 3 MM, ROHS COMPLIANT, MSOP-8 SOIC-8 3 X 3 MM, ROHS COMPLIANT, MSOP-8 SOP, SOP8,.25 SOP, SOP8,.25
Contacts 8 8 8 8 8 8 8 8 8 8
Manufacturer packaging code DCG8 DCG8 DCG8 DCG8 DCG8 DVG8 DCG8 DVG8 DCG8 DCG8
Reach Compliance Code compliant compli compliant compliant compliant unknown compliant unknown compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
series 570 570 570 570 570 570 570 570 570 570
Input adjustment STANDARD STANDARD STANDARD STANDARD STANDARD STANDARD STANDARD STANDARD STANDARD STANDARD
JESD-30 code R-PDSO-G8 R-PDSO-G8 R-PDSO-G8 R-PDSO-G8 R-PDSO-G8 S-PDSO-G8 R-PDSO-G8 S-PDSO-G8 R-PDSO-G8 R-PDSO-G8
JESD-609 code e3 e3 e3 e3 e3 e3 e3 e3 e3 e3
length 4.9 mm 4.9 mm 4.9 mm 4.9 mm 4.9 mm 3 mm 4.9 mm 3 mm 4.9 mm 4.9 mm
Logic integrated circuit type PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER
MaximumI(ol) 0.012 A 0.012 A 0.012 A 0.012 A 0.012 A 0.012 A 0.012 A 0.012 A 0.012 A 0.012 A
Humidity sensitivity level 1 1 1 1 1 3 1 3 1 1
Number of functions 1 1 1 1 1 1 1 1 1 1
Number of terminals 8 8 8 8 8 8 8 8 8 8
Actual output times 2 2 2 2 2 1 2 1 2 2
Maximum operating temperature 85 °C 85 °C 70 °C 70 °C 85 °C 85 °C 70 °C 85 °C 85 °C 70 °C
Minimum operating temperature -40 °C -40 °C - - -40 °C -40 °C - -40 °C -40 °C -
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP SOP SOP SOP TSSOP SOP TSSOP SOP SOP
Encapsulate equivalent code SOP8,.25 SOP8,.25 SOP8,.25 SOP8,.25 SOP8,.25 TSSOP8,.19 SOP8,.25 TSSOP8,.19 SOP8,.25 SOP8,.25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR SQUARE RECTANGULAR SQUARE RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED 260 NOT SPECIFIED 260 NOT SPECIFIED NOT SPECIFIED
power supply 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.2 ns 0.175 ns 0.175 ns 0.2 ns 0.175 ns 0.03 ns 0.2 ns 0.03 ns 0.2 ns 0.175 ns
Maximum seat height 1.75 mm 1.75 mm 1.75 mm 1.75 mm 1.75 mm 1.1 mm 1.75 mm 1.1 mm 1.75 mm 1.75 mm
Maximum supply voltage (Vsup) 5.25 V 3.45 V 3.45 V 5.25 V 3.45 V 3.45 V 5.25 V 3.45 V 5.25 V 3.45 V
Minimum supply voltage (Vsup) 4.75 V 3.15 V 3.15 V 4.75 V 3.15 V 3.15 V 4.75 V 3.15 V 4.75 V 3.15 V
Nominal supply voltage (Vsup) 5 V 3.3 V 3.3 V 5 V 3.3 V 3.3 V 5 V 3.3 V 5 V 3.3 V
surface mount YES YES YES YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL COMMERCIAL COMMERCIAL INDUSTRIAL INDUSTRIAL COMMERCIAL INDUSTRIAL INDUSTRIAL COMMERCIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 0.65 mm 1.27 mm 0.65 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 3.9 mm 3.9 mm 3.9 mm 3.9 mm 3.9 mm 3 mm 3.9 mm 3 mm 3.9 mm 3.9 mm
Base Number Matches 1 1 1 1 1 1 1 1 1 1
minfmax 170 MHz 170 MHz 170 MHz 170 MHz 170 MHz - 170 MHz - 170 MHz 170 MHz
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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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