MT48LC8M16A2B4-6A AAT:L TR datasheet, PDF

Datasheet> All Categories > semiconductor> memory> MT48LC8M16A2B4-6A AAT:L TR

MT48LC8M16A2B4-6A AAT:L TR: DescriptionSDRAM 存储器 IC 128Mb（8M x 16）并联 167 MHz 5.4 ns 54-VFBGA（8x8）; Categorysemiconductor memory; File Size1MB，94 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

Download Datasheet Parametric View All

MT48LC8M16A2B4-6A AAT:L TR Overview

SDRAM 存储器 IC 128Mb（8M x 16）并联 167 MHz 5.4 ns 54-VFBGA（8x8）

MT48LC8M16A2B4-6A AAT:L TR Parametric

Parameter Name	Attribute value
category
Maker	Micron Technology
series	Automotive, AEC-Q100
Package	Tape and Reel (TR)
memory type	Volatile
memory format	DRAM
technology	SDRAM
storage	128Mb（8M x 16）
memory interface	in parallel
Write cycle time - words, pages	12ns
Voltage - Power supply	3V ~ 3.6V
Operating temperature	-40°C ~ 105°C（TA）
Installation type	surface mount type
Package/casing	54-VFBGA
Supplier device packaging	54-VFBGA（8x8）
Clock frequency	167 MHz
interview time	5.4 ns
Basic product number	MT48LC8M16A2

Preview

Download Datasheet

View All

256Mb: x4, x8, x16 SDRAM

Features

SDR SDRAM

MT48LC64M4A2 – 16 Meg x 4 x 4 banks

MT48LC32M8A2 – 8 Meg x 8 x 4 banks

MT48LC16M16A2 – 4 Meg x 16 x 4 banks

Features

• PC100- and PC133-compliant

• Fully synchronous; all signals registered on positive

edge of system clock

• Internal, pipelined operation; column address can

be changed every clock cycle

• Internal banks for hiding row access/precharge

• Programmable burst lengths: 1, 2, 4, 8, or full page

• Auto precharge, includes concurrent auto precharge

and auto refresh modes

• Self refresh mode (not available on AT devices)

• Auto refresh

– 64ms, 8192-cycle refresh (commercial and

industrial)

– 16ms, 8192-cycle refresh (automotive)

• LVTTL-compatible inputs and outputs

• Single 3.3V ±0.3V power supply

Options

• Configurations

– 64 Meg x 4 (16 Meg x 4 x 4 banks)

– 32 Meg x 8 (8 Meg x 8 x 4 banks)

– 16 Meg x 16 (4 Meg x 16 x 4 banks)

• Write recovery (

WR)

–

WR = 2 CLK

• Plastic package – OCPL

– 54-pin TSOP II OCPL

(400 mil)

(standard)

– 54-pin TSOP II OCPL

(400 mil)

Pb-free

– 60-ball TFBGA (x4, x8) (8mm x

16mm)

– 60-ball TFBGA (x4, x8) (8mm x

16mm) Pb-free

– 54-ball VFBGA (x16) (8mm x 14 mm)

Pb-free

– 54-ball VFBGA (x16) (8mm x 8 mm)

Pb-free

• Timing – cycle time

– 6ns @ CL = 3 (x8, x16 only)

– 7.5ns @ CL = 3 (PC133)

– 7.5ns @ CL = 2 (PC133)

• Self refresh

– Standard

– Low power

• Operating temperature range

– Commercial (0˚C to +70˚C)

– Industrial (–40˚C to +85˚C)

– Automotive (–40˚C to +105˚C)

• Revision

Notes:

Off-center parting line.

Only available on Revision D.

Only available on Revision G.

Contact Micron for availability.

Marking

64M4

32M8

16M16

-6A

-75

-7E

None

:D/:G

PDF: 09005aef8091e6d1

256Mb_sdr.pdf - Rev. W 05/15 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Products and specifications discussed herein are subject to change by Micron without notice.

256Mb: x4, x8, x16 SDRAM

Features

Contents

Important Notes and Warnings ......................................................................................................................... 8

General Description ......................................................................................................................................... 8

Automotive Temperature .............................................................................................................................. 9

Functional Block Diagrams ............................................................................................................................. 10

Pin and Ball Assignments and Descriptions ..................................................................................................... 13

Package Dimensions ....................................................................................................................................... 17

Temperature and Thermal Impedance ............................................................................................................ 21

Electrical Specifications .................................................................................................................................. 25

Electrical Specifications – I

Parameters ........................................................................................................ 27

Electrical Specifications – AC Operating Conditions ......................................................................................... 29

Functional Description ................................................................................................................................... 32

Commands .................................................................................................................................................... 33

COMMAND INHIBIT .................................................................................................................................. 33

NO OPERATION (NOP) ............................................................................................................................... 34

LOAD MODE REGISTER (LMR) ................................................................................................................... 34

ACTIVE ...................................................................................................................................................... 34

READ ......................................................................................................................................................... 35

WRITE ....................................................................................................................................................... 36

PRECHARGE .............................................................................................................................................. 37

BURST TERMINATE ................................................................................................................................... 37

REFRESH ................................................................................................................................................... 38

AUTO REFRESH ..................................................................................................................................... 38

SELF REFRESH ....................................................................................................................................... 38

Truth Tables ................................................................................................................................................... 39

Initialization .................................................................................................................................................. 44

Mode Register ................................................................................................................................................ 46

Burst Length .............................................................................................................................................. 48

Burst Type .................................................................................................................................................. 48

CAS Latency ............................................................................................................................................... 50

Operating Mode ......................................................................................................................................... 50

Write Burst Mode ....................................................................................................................................... 50

Bank/Row Activation ...................................................................................................................................... 51

READ Operation ............................................................................................................................................. 52

WRITE Operation ........................................................................................................................................... 61

Burst Read/Single Write .............................................................................................................................. 68

PRECHARGE Operation .................................................................................................................................. 69

Auto Precharge ........................................................................................................................................... 69

AUTO REFRESH Operation ............................................................................................................................. 81

SELF REFRESH Operation ............................................................................................................................... 83

Power-Down .................................................................................................................................................. 85

Clock Suspend ............................................................................................................................................... 86

Revision History ............................................................................................................................................. 89

Rev. W – 05/15 ............................................................................................................................................ 89

Rev. W – 09/14 ............................................................................................................................................ 89

Rev. V – 1/14, 8/14 ...................................................................................................................................... 89

Rev. U – 05/13 ............................................................................................................................................. 89

Rev. T – 03/13 ............................................................................................................................................. 89

Rev. S – 12/12 ............................................................................................................................................. 89

Rev. R – 10/12 ............................................................................................................................................. 89

Rev. Q – 02/12 ............................................................................................................................................. 89

PDF: 09005aef8091e6d1

256Mb_sdr.pdf - Rev. W 05/15 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

256Mb: x4, x8, x16 SDRAM

Features

Rev. P – 12/11 .............................................................................................................................................

Rev. O – 07/11 .............................................................................................................................................

Rev. N – 01/10 .............................................................................................................................................

Rev. M – 11/08 ............................................................................................................................................

Rev. L – 08/07 .............................................................................................................................................

Rev. K – 02/07 .............................................................................................................................................

Rev. K – 06/06 .............................................................................................................................................

Rev. J – 03/05 ..............................................................................................................................................

Rev. H – 02/05 .............................................................................................................................................

Rev. H – 10/04 .............................................................................................................................................

Rev. G – 08/03 .............................................................................................................................................

Rev. F – 01/03 .............................................................................................................................................

Rev. E – 03/02 .............................................................................................................................................

Rev. D – 07/01 .............................................................................................................................................

Rev. C – 03/01 .............................................................................................................................................

Rev. B – 10/00 .............................................................................................................................................

Rev. A – 11/99 .............................................................................................................................................

PDF: 09005aef8091e6d1

256Mb_sdr.pdf - Rev. W 05/15 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

256Mb: x4, x8, x16 SDRAM

Features

List of Figures

Figure 1: 64 Meg x 4 Functional Block Diagram ...............................................................................................

Figure 2: 32 Meg x 8 Functional Block Diagram ...............................................................................................

Figure 3: 16 Meg x 16 Functional Block Diagram .............................................................................................

Figure 4: 54-Pin TSOP (Top View) ..................................................................................................................

Figure 5: 60-Ball FBGA (Top View) .................................................................................................................

Figure 6: 54-Ball VFBGA (Top View) ...............................................................................................................

Figure 7: 54-Pin Plastic TSOP "TG/P" (400 mil) ...............................................................................................

Figure 8: 60-Ball TFBGA "BB/FB" (8mm x 16mm) (x4, x8) ...............................................................................

Figure 9: 54-Ball VFBGA "BG/FG" (8mm x 14mm) (x16) ..................................................................................

Figure 10: 54-Ball VFBGA "B4/F4" (8mm x 8mm) (x16) ...................................................................................

Figure 11: Example: Temperature Test Point Location, 54-Pin TSOP (Top View) ...............................................

Figure 12: Example: Temperature Test Point Location, 54-Ball VFBGA (Top View) ............................................

Figure 13: Example: Temperature Test Point Location, 60-Ball FBGA (Top View) ..............................................

Figure 14: ACTIVE Command ........................................................................................................................

Figure 15: READ Command ...........................................................................................................................

Figure 16: WRITE Command .........................................................................................................................

Figure 17: PRECHARGE Command ................................................................................................................

Figure 18: Initialize and Load Mode Register ..................................................................................................

Figure 19: Mode Register Definition ...............................................................................................................

Figure 20: CAS Latency ..................................................................................................................................

Figure 21: Example: Meeting

RCD (MIN) When 2 <

RCD (MIN)/

CK < 3 ..........................................................

Figure 22: Consecutive READ Bursts ..............................................................................................................

Figure 23: Random READ Accesses ................................................................................................................

Figure 24: READ-to-WRITE ............................................................................................................................

Figure 25: READ-to-WRITE With Extra Clock Cycle .........................................................................................

Figure 26: READ-to-PRECHARGE ..................................................................................................................

Figure 27: Terminating a READ Burst .............................................................................................................

Figure 28: Alternating Bank Read Accesses .....................................................................................................

Figure 29: READ Continuous Page Burst .........................................................................................................

Figure 30: READ – DQM Operation ................................................................................................................

Figure 31: WRITE Burst .................................................................................................................................

Figure 32: WRITE-to-WRITE ..........................................................................................................................

Figure 33: Random WRITE Cycles ..................................................................................................................

Figure 34: WRITE-to-READ ............................................................................................................................

Figure 35: WRITE-to-PRECHARGE .................................................................................................................

Figure 36: Terminating a WRITE Burst ............................................................................................................

Figure 37: Alternating Bank Write Accesses .....................................................................................................

Figure 38: WRITE – Continuous Page Burst .....................................................................................................

Figure 39: WRITE – DQM Operation ...............................................................................................................

Figure 40: READ With Auto Precharge Interrupted by a READ .........................................................................

Figure 41: READ With Auto Precharge Interrupted by a WRITE ........................................................................

Figure 42: READ With Auto Precharge ............................................................................................................

Figure 43: READ Without Auto Precharge .......................................................................................................

Figure 44: Single READ With Auto Precharge ..................................................................................................

Figure 45: Single READ Without Auto Precharge .............................................................................................

Figure 46: WRITE With Auto Precharge Interrupted by a READ ........................................................................

Figure 47: WRITE With Auto Precharge Interrupted by a WRITE ......................................................................

Figure 48: WRITE With Auto Precharge ...........................................................................................................

Figure 49: WRITE Without Auto Precharge .....................................................................................................

Figure 50: Single WRITE With Auto Precharge .................................................................................................

PDF: 09005aef8091e6d1

256Mb_sdr.pdf - Rev. W 05/15 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Recommended Resources

What is a capacitor switching switch?

Thyristor overcurrent protection circuit one b

Timing power supply socket circuit controlled by dual electronic meters

Buck-Boost Regulator Circuit Diagram

Skin resistance polygraph

Brine pump circuit

Q: How to get the lead from the newly purchased 9B96 development board?: Only the jumpers corresponding to the pins are given. How to bring out the required pins and connect them to the external circuit?...; 喜鹊王子 TI Technology Forum

Urgent!!! Regarding the issue of using GPRS module to transmit data to PC!!: Experts, please help me. I want to implement the GPRS module to send data to a computer with internet access. I have been working on it for a long time but still can't get it done, so I have to ask fo...; bestall100 Embedded System

How does the power LED lighting industry use thermally conductive insulating materials?: Thermally conductive silicone sheets are used between the aluminum substrate and the shell. The function of thermally conductive silicone is to transfer the heat of the working aluminum substrate to t...; sz3ke LED Zone

Board Layout for High Resolution ADC: Analog/digital converters (A/D converters) are key analog processing components in a variety of applications such as mass spectrometers, ultrasound, LiDAR/radar, and telecom transceiver modules. Wheth...; clj2004000 RF/Wirelessly

How many types of reset pulses are there for MCU or CPU?: Could you tell me how many reset pulses there are for MCU or CPU? What are the reset pulse signals? Thank you...; fengxiaoyu MCU

Design an electronic meter that can measure 0-1.5A current and automatically switch ranges: Design a circuit diagram of an electronic instrument that can measure 0-1.5A current and automatically switch the range...; taohaha Analog electronics

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components