MT47H128M8CF-25E AIT:H datasheet, PDF

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MT47H128M8CF-25E AIT:H: DescriptionSDRAM - DDR2 存储器 IC 1Gb（128M x 8）并联 400 MHz 400 ps 60-FBGA（8x10）; Categorysemiconductor memory; File Size2MB，141 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

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MT47H128M8CF-25E AIT:H Overview

SDRAM - DDR2 存储器 IC 1Gb（128M x 8）并联 400 MHz 400 ps 60-FBGA（8x10）

MT47H128M8CF-25E AIT:H Parametric

Parameter Name	Attribute value
category
Maker	Micron Technology
series	Automotive, AEC-Q100
Package	Bulk
memory type	Volatile
memory format	DRAM
technology	SDRAM - DDR2
storage	1Gb（128M x 8）
memory interface	in parallel
Write cycle time - words, pages	15ns
Voltage - Power supply	1.7V ~ 1.9V
Operating temperature	-40°C ~ 95°C（TC）
Installation type	surface mount type
Package/casing	60-TFBGA
Supplier device packaging	60-FBGA（8x10）
Clock frequency	400 MHz
interview time	400 ps
Basic product number	MT47H128M8

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1Gb: x4, x8, x16 DDR2 SDRAM

Features

DDR2 SDRAM

MT47H256M4 – 32 Meg x 4 x 8 banks

MT47H128M8 – 16 Meg x 8 x 8 banks

MT47H64M16 – 8 Meg x 16 x 8 banks

Features

•

= 1.8V ±0.1V, V

DDQ

= 1.8V ±0.1V

JEDEC-standard 1.8V I/O (SSTL_18-compatible)

Differential data strobe (DQS, DQS#) option

4n-bit prefetch architecture

Duplicate output strobe (RDQS) option for x8

DLL to align DQ and DQS transitions with CK

8 internal banks for concurrent operation

Programmable CAS latency (CL)

Posted CAS additive latency (AL)

WRITE latency = READ latency - 1

Selectable burst lengths (BL): 4 or 8

Adjustable data-output drive strength

64ms, 8192-cycle refresh

On-die termination (ODT)

Industrial temperature (IT) option

Automotive temperature (AT) option

RoHS-compliant

Supports JEDEC clock jitter specification

Options

• Configuration

– 256 Meg x 4 (32 Meg x 4 x 8 banks)

– 128 Meg x 8 (16 Meg x 8 x 8 banks)

– 64 Meg x 16 (8 Meg x 16 x 8 banks)

• FBGA package (Pb-free) – x16

– 84-ball FBGA (8mm x 12.5mm) Die

Rev :H

– 84-ball FBGA (8mm x 12.5mm) Die

Rev :M

• FBGA package (Pb-free) – x4, x8

– 60-ball FBGA (8mm x 10mm) Die

Rev :H

– 60-ball FBGA (8mm x 10mm) Die

Rev :M

• FBGA package (lead solder) – x16

– 84-ball FBGA (8mm x 12.5mm) Die

Rev :H

• FBGA package (lead solder) – x4, x8

– 60-ball FBGA (8mm x 10mm) Die

Rev :H

• Timing – cycle time

– 1.875ns @ CL = 7 (DDR2-1066)

– 2.5ns @ CL = 5 (DDR2-800)

– 3.0ns @ CL = 5 (DDR2-667)

• Self refresh

– Standard

– Low-power

• Operating temperature

– Commercial (0°C T

+85°C)

– Industrial (–40°C T

+95°C;

–40°C T

+85°C)

• Revision

Notes:

Marking

256M4

128M8

64M16

-187E

-25E

-3

None

:H / :M

1. Not all options listed can be combined to

define an offered product. Use the Part

Catalog Search on www.micron.com for

product offerings and availability.

2. For extended CT operating temperature see

IDD Table 11 (page 32) Note 7.

CCMTD-1725822587-9658

1GbDDR2.pdf – Rev. AB 09/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Products and specifications discussed herein are subject to change by Micron without notice.

1Gb: x4, x8, x16 DDR2 SDRAM

Features

Contents

Important Notes and Warnings ......................................................................................................................... 8

State Diagram .................................................................................................................................................. 9

Functional Description ................................................................................................................................... 10

Industrial Temperature ............................................................................................................................... 10

General Notes ............................................................................................................................................ 11

Functional Block Diagrams ............................................................................................................................. 12

Ball Assignments and Descriptions ................................................................................................................. 15

Packaging ...................................................................................................................................................... 19

Package Dimensions ................................................................................................................................... 19

FBGA Package Capacitance ......................................................................................................................... 23

Electrical Specifications – Absolute Ratings ..................................................................................................... 24

Temperature and Thermal Impedance ........................................................................................................ 24

Electrical Specifications – I

Parameters ........................................................................................................ 28

Specifications and Conditions ............................................................................................................... 28

DD7

Conditions .......................................................................................................................................... 28

AC Timing Operating Specifications ................................................................................................................ 34

AC and DC Operating Conditions .................................................................................................................... 46

ODT DC Electrical Characteristics ................................................................................................................... 47

Input Electrical Characteristics and Operating Conditions ............................................................................... 48

Output Electrical Characteristics and Operating Conditions ............................................................................. 51

Output Driver Characteristics ......................................................................................................................... 53

Power and Ground Clamp Characteristics ....................................................................................................... 57

AC Overshoot/Undershoot Specification ......................................................................................................... 58

Input Slew Rate Derating ................................................................................................................................ 60

Commands .................................................................................................................................................... 74

Truth Tables ............................................................................................................................................... 74

DESELECT ................................................................................................................................................. 78

NO OPERATION (NOP) ............................................................................................................................... 79

LOAD MODE (LM) ...................................................................................................................................... 79

ACTIVATE .................................................................................................................................................. 79

READ ......................................................................................................................................................... 79

WRITE ....................................................................................................................................................... 79

PRECHARGE .............................................................................................................................................. 80

REFRESH ................................................................................................................................................... 80

SELF REFRESH ........................................................................................................................................... 80

Mode Register (MR) ........................................................................................................................................ 81

Burst Length .............................................................................................................................................. 81

Burst Type .................................................................................................................................................. 83

Operating Mode ......................................................................................................................................... 83

DLL RESET ................................................................................................................................................. 83

Write Recovery ........................................................................................................................................... 83

Power-Down Mode ..................................................................................................................................... 84

CAS Latency (CL) ........................................................................................................................................ 84

Extended Mode Register (EMR) ....................................................................................................................... 86

DLL Enable/Disable ................................................................................................................................... 87

Output Drive Strength ................................................................................................................................ 87

DQS# Enable/Disable ................................................................................................................................. 87

RDQS Enable/Disable ................................................................................................................................. 87

Output Enable/Disable ............................................................................................................................... 87

On-Die Termination (ODT) ......................................................................................................................... 88

CCMTD-1725822587-9658

1GbDDR2.pdf – Rev. AB 09/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

1Gb: x4, x8, x16 DDR2 SDRAM

Features

Off-Chip Driver (OCD) Impedance Calibration ............................................................................................ 88

Posted CAS Additive Latency (AL) ................................................................................................................ 88

Extended Mode Register 2 (EMR2) ................................................................................................................... 90

Extended Mode Register 3 (EMR3) ................................................................................................................... 91

Initialization .................................................................................................................................................. 92

ACTIVATE ...................................................................................................................................................... 95

READ ............................................................................................................................................................. 97

READ with Precharge ................................................................................................................................. 101

READ with Auto Precharge ......................................................................................................................... 103

WRITE .......................................................................................................................................................... 109

PRECHARGE ................................................................................................................................................. 120

REFRESH ...................................................................................................................................................... 121

SELF REFRESH .............................................................................................................................................. 122

Power-Down Mode ........................................................................................................................................ 124

Precharge Power-Down Clock Frequency Change ........................................................................................... 131

Reset ............................................................................................................................................................. 132

CKE Low Anytime ...................................................................................................................................... 132

ODT Timing .................................................................................................................................................. 134

MRS Command to ODT Update Delay ........................................................................................................ 136

CCMTD-1725822587-9658

1GbDDR2.pdf – Rev. AB 09/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

1Gb: x4, x8, x16 DDR2 SDRAM

Features

List of Figures

Figure 1: 1Gb DDR2 Part Numbers ................................................................................................................... 2

Figure 2: Simplified State Diagram ................................................................................................................... 9

Figure 3: 256 Meg x 4 Functional Block Diagram ............................................................................................. 12

Figure 4: 128 Meg x 8 Functional Block Diagram ............................................................................................. 13

Figure 5: 64 Meg x 16 Functional Block Diagram ............................................................................................. 14

Figure 6: 60-Ball FBGA – x4, x8 Ball Assignments (Top View) ........................................................................... 15

Figure 7: 84-Ball FBGA – x16 Ball Assignments (Top View) ............................................................................... 16

Figure 8: 84-Ball FBGA Package (8mm x 12.5mm) – x16 Die Rev :H .................................................................. 19

Figure 9: 60-Ball FBGA (8mm x 10mm) – x4, x8 Die Rev :H ............................................................................... 20

Figure 10: 84-Ball FBGA Package (8mm x 12.5mm) – x16; "NF" Die Rev :M ....................................................... 21

Figure 11: 60-Ball FBGA (8mm x 10mm) – x4, x8; "SH" Die Rev :M ................................................................... 22

Figure 12: Example Temperature Test Point Location ...................................................................................... 26

Figure 13: Single-Ended Input Signal Levels ................................................................................................... 48

Figure 14: Differential Input Signal Levels ...................................................................................................... 49

Figure 15: Differential Output Signal Levels .................................................................................................... 51

Figure 16: Output Slew Rate Load .................................................................................................................. 52

Figure 17: Full Strength Pull-Down Characteristics ......................................................................................... 53

Figure 18: Full Strength Pull-Up Characteristics .............................................................................................. 54

Figure 19: Reduced Strength Pull-Down Characteristics .................................................................................. 55

Figure 20: Reduced Strength Pull-Up Characteristics ...................................................................................... 56

Figure 21: Input Clamp Characteristics .......................................................................................................... 57

Figure 22: Overshoot ..................................................................................................................................... 58

Figure 23: Undershoot ................................................................................................................................... 58

Figure 24: Nominal Slew Rate for

IS ............................................................................................................... 63

Figure 25: Tangent Line for

IS ........................................................................................................................ 63

Figure 26: Nominal Slew Rate for

IH .............................................................................................................. 64

Figure 27: Tangent Line for

IH ....................................................................................................................... 64

Figure 28: Nominal Slew Rate for

DS ............................................................................................................. 70

Figure 29: Tangent Line for

DS ...................................................................................................................... 70

Figure 30: Nominal Slew Rate for

DH ............................................................................................................. 71

Figure 31: Tangent Line for

DH ..................................................................................................................... 71

Figure 32: AC Input Test Signal Waveform Command/Address Balls ................................................................ 72

Figure 33: AC Input Test Signal Waveform for Data with DQS, DQS# (Differential) ............................................ 72

Figure 34: AC Input Test Signal Waveform for Data with DQS (Single-Ended) ................................................... 73

Figure 35: AC Input Test Signal Waveform (Differential) .................................................................................. 73

Figure 36: MR Definition ............................................................................................................................... 82

Figure 37: CL ................................................................................................................................................. 85

Figure 38: EMR Definition ............................................................................................................................. 86

Figure 39: READ Latency ............................................................................................................................... 89

Figure 40: WRITE Latency .............................................................................................................................. 89

Figure 41: EMR2 Definition ........................................................................................................................... 90

Figure 42: EMR3 Definition ........................................................................................................................... 91

Figure 43: DDR2 Power-Up and Initialization ................................................................................................. 92

Figure 44: Example: Meeting

RRD (MIN) and

RCD (MIN) .............................................................................. 95

Figure 45: Multibank Activate Restriction ....................................................................................................... 96

Figure 46: READ Latency ............................................................................................................................... 98

Figure 47: Consecutive READ Bursts .............................................................................................................. 99

Figure 48: Nonconsecutive READ Bursts ....................................................................................................... 100

Figure 49: READ Interrupted by READ ........................................................................................................... 101

Figure 50: READ-to-WRITE ........................................................................................................................... 101

CCMTD-1725822587-9658

1GbDDR2.pdf – Rev. AB 09/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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