Mighty Gecko Wireless SoC
EFR32MG1X232 Data Sheet
The Mighty Gecko family of wireless solutions combines an ener-
gy-friendly MCU with a highly integrated radio transceiver support-
ing Bluetooth Smart®, wireless mesh, and proprietary short range
wireless protocols.
The IoT System-On-Chip provides industry-leading energy efficiency, ultra-fast wakeup
times, a scalable power amplifier, an integrated balun and no-compromise MCU fea-
tures.
Mighty Gecko applications include
• Connected Home
• Lighting
• Sports and Fitness
• Metering
• Building Automation
Available energy modes:
EM0 – EM1
EM0 – EM4
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This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Silicon
Laboratories Confidential. Information contained herein is covered under non-disclosure agreement (NDA).
C
Flash Program Memory
Connectivity
2 x USART
Low Energy UART
TM
I
2
C
Up to 31 GPIO
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EFR32 Wireless Gecko
Core / Memory
ARM Cortex
TM
M4, 40 MHz CPU
with DSP extensions and FPU
KEY FEATURES
• 32-bit ARM® Cortex®-M4 core with 40
MHz maximum operating frequency
• Low energy active and sleep currents
• Scalable Memory and Radio configuration
options available in several footprint
compatible QFN packages
• 12-channel Peripheral Reflex System
enabling autonomous interaction of MCU
peripherals
• Autonomous Hardware Crypto Accelerator
and True Random Number Generator
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Radio
Integrated PA, LNA, BALUN
Packet and State Trace
Power / Clock
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DC-DC Regulator
Clocks:
2 x Crystal Oscillators
4 x RC Oscillators
Digital PLL
RAM Memory
32-bit bus
Peripheral Reflex System
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Timer
6 x TIMERs
Low Energy Timer
CRYOTIMER
Pulse Counter
Watchdog
RTC
Analog
Security
TRUE RNG
ADC
IDAC
2 x Analog Comparators
CRYPTO Hardware Accelerator:
AES-128/256
SHA-1/2
RSA-2048
Preliminary Rev. 0.71
EFR32MG1X232 Data Sheet
Features
1. Features
•
Low Power Wireless System-on-Chip.
• High Performance 32-bit 40 MHz ARM Cortex-M4 with
DSP instruction and floating-point unit for efficient signal
processing
• Up to 256 kB flash program memory
• Up to 32 kB RAM data memory
• 2.4 GHz radio operation
• TX power up to 19.5 dBm
•
Low Energy Consumption
• 8.6 mA RX current at 2.4 GHz (1 Mbps GFSK)
• 9.1 mA RX current at 2.4 GHz (250 kbps O-QPSK DSSS)
• 8.2 mA TX current @ 0 dBm output power at 2.4 GHz
• 60 µA/MHz in Energy Mode 0 (EM0)
• 1.35 µA EM2 DeepSleep current (full RAM retention and
RTCC running from LFXO)
• 1 µA EM3 Stop current (State/RAM retention)
• Wake on Radio with signal strength detection, preamble
pattern detection, frame detection and timeout
•
High Receiver Performance
• -94 dBm sensitivity at 1 Mbps GFSK
• -99.4 dBm sensitivity at 250 kbps O-QPSK DSSS
•
Modulation Format(s) Supported
• 2-FSK / 4-FSK with fully configurable shaping
• Shaped OQPSK / (G)MSK
•
Supported Protocol(s)
• Bluetooth Smart
• ZigBee®
• Thread
• 2.4 GHz Proprietary Protocols
•
Wide selection of MCU peripherals
• 12-bit 1 Msamples/s SAR Analog to Digital Converter
• 2× Analog Comparator
• Digital to Analog Current Converter (IDAC)
• Up to 31 pins connected to analog channels (APORT)
shared between Analog Comparators, ADC, and IDAC
• 31 General Purpose I/O pins with output state retention
and asynchronous interrupts
• 8 Channel DMA Controller
• 12 Channel Peripheral Reflex System (PRS)
• Hardware Crypto Acceleration with public key support
• 2×16-bit Timer/Counter
• 3 + 4 Compare/Capture/PWM channels
• 32-bit Real Time Counter and Calendar
• 16-bit Low Energy Timer for waveform generation
• 32-bit Ultra Low Energy Timer/Counter for periodic wake-
up from any Energy Mode
• 16-bit Pulse Counter with asynchronous operation
• Watchdog Timer with dedicated RC oscillator @ 50 nA
• 2×Universal Synchronous/Asynchronous Receiver/Trans-
mitter (UART/SPI/SmartCard (ISO 7816)/IrDA/I
2
S)
• Low Energy UART (LEUART
TM
)
• I
2
C interface with SMBus support and address recogni-
tion in EM3 Stop
•
Wide Operating Range
• 1.62 V to 3.8 V single power supply
• -40 °C to 85 °C
•
QFN48 7x7 mm Package
C
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EFR32MG1X232 Data Sheet
Ordering Information
2. Ordering Information
Ordering Code
Frequency
Band
2.4 GHz
Core
Flash
(kB)
256
RAM
(kB)
32
Protocol Stack
Encryption
Max TX
Power
(dBm)
19.5
EFR32MG1P232F256GM48-A0
M4
• Bluetooth
Full
Smart
• ZigBee/Thread
• ZigBee RC
• Proprietary
• Bluetooth
Full
Smart
• ZigBee/Thread
• ZigBee RC
• Proprietary
• ZigBee/Thread Full
• ZigBee RC
EFR32MG1P232F256GM48-B0
2.4 GHz
M4
256
32
19.5
C
EFR32MG1B232F256GM48-B0
Gecko
Wireless Gecko 32-bit
2.4 GHz
M4
256
32
19.5
EFR32 F G 1 P 133 F 256 G M 32
–
A0 R
Tape and Reel (Optional)
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Generation
Performance Grade – P (Performance), B (Basic), V (Value)
Family – M (Mighty), B (Blue), Z (Zappy), F (Flex)
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Revision
Pin Count
Flash Memory Size in kB
Memory Type (Flash)
Package – M (QFN), J (WLSCP)
Temperature Grade – G (-40 to +85 °C), I (-40 to +125 °C)
Feature Set Code – r2r1r0
r2: Reserved
r1: RF Type – 3 (TRX), 2 (RX), 1 (TX)
r0: Frequency Band – 3 (dual-band), 2 (2.4 GHz), 1 (sub-GHz)
Figure 2.1. OPN Decoder
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EFR32MG1X232 Data Sheet
System Overview
3. System Overview
3.1 Introduction
The EFR32 product family features the world’s most energy friendly System-on-Chip radios. The devices are well suited for any battery
operated application as well as other systems requiring high performance and low energy consumption. This section gives a short intro-
duction to the full radio and MCU system. The detailed functional description can be found in the EFR32 Reference Manual.
3.2 Block Diagram
A block diagram of the EFR32MG1X232 is shown in
Figure 3.1 Block Diagram on page 3.
BUFC
FRC
CRC
MOD
RAC
C
Core / Memory
ARM Cortex M4 processor
with DSP extensions and FPU
TM
Clock Management
High Frequency
Crystal Oscillator
Low Frequency
RC Oscillator
High Frequency
RC Oscillator
Auxiliary High
Frequency RC
Oscillator
Ultra Low
Frequency RC
Oscillator
Energy Management
Voltage
Regulators
Voltage Monitor
Other
CRYPTO
Memory
Protection Unit
on
RAM Memory
Debug Interface
DMA Controlller
Low Frequency
Crystal Oscillator
DC/DC Regulator
Power-On Reset
CRC
Flash Program
Memory
Brown-Out
Detector
32-bit bus
Peripheral Reflex System
Serial I/F
USART
Radio Transceiver
I/O Ports
External
Interrupts
Timers and Triggers
Timer/Counter
Protocol Timer
Analog I/F
ADC
RFSENSE
DEMOD
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Low Energy
UART
TM
General
Purpose I/O
I
2
C
Pin Reset
Pin Wakeup
EM2—Deep Sleep
EM3—Stop
LNA
I
PGA
IFADC
Low Energy
Timer
Watchdog Timer
Real Time
Counter and
Calendar
Cryotimer
Analog
Comparator
BALUN
RF Frontend
PA
Q
AGC
Frequency
Synthesizer
Pulse Counter
IDAC
Lowest power mode with peripheral operational:
EM0—Active
EM1—Sleep
Figure 3.1. Block Diagram
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EM4—Hibernate
EM4—Shutoff
3.3 System Description
3.3.1 Antenna interface
The 2.4 GHz antenna interface consists of two pins (2GRF_IOP and 2GRF_ION) that interface directly to the on-chip BALUN. The
2GRF_ION pin should be grounded externally.
The external components and power supply connections for the antenna interface in a typical application are shown in Section
5. Appli-
cation Circuits.
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EFR32MG1X232 Data Sheet
System Overview
3.3.2 Integrated Oscillators
The EFR32MG1X232 supports two crystal oscillators and fully integrates four RC oscillators, listed below.
• A high frequency crystal oscillator (HFXO) with integrated load capacitors, tunable in small steps, provides a precise timing refer-
ence for the radio and MCU. Crystal frequencies in the range from 38 to 40 MHz are supported. Silicon Laboratories reference de-
signs employ a crystal frequency of 38.4 MHz. An external clock source such as a TCXO can also be applied to the HFXO input for
improved accuracy over temperature.
• An optional 32.768 kHz crystal oscillator (LFXO) can be used as an accurate timing reference in low energy modes.
• A 32.768 kHz crystal oscillator (LFXO) should be used as an accurate timing reference in Bluetooth Smart low energy modes.
• An integrated high frequency RC oscillator (HFRCO) is available for the MCU system, when crystal accuracy is not required. The
HFRCO employs fast startup at minimal energy consumption combined with a wide frequency range.
• An integrated auxilliary high frequency RC oscillator (AUXHFRCO) is available for timing the general-purpose ADC and the Serial
Wire debug port with a wide frequency range.
• An integrated low frequency 32.768 kHz RC oscillator (LFRCO) can be used as a timing reference in low energy modes, when crys-
tal accuracy is not required.
• An integrated ultra-low frequency 1 kHz RC oscillator (ULFRCO) is available to provide a timing reference at the lowest energy con-
sumption in low energy modes.
C
3.3.4 Receiver Architecture
3.3.3 Fractional-N Frequency Synthesizer
The EFR32MG1X232 contains a high performance, low phase noise, fully integrated fractional-N frequency synthesizer. The synthesiz-
er is used in receive mode to generate the LO frequency used by the down-conversion mixer. It is also used in transmit mode to directly
generate the modulated RF carrier.
The fractional-N architecture provides excellent phase noise performance combined with frequency resolution better than 100 Hz, with
low energy consumption. The synthesizer has fast frequency settling which allows very short receiver and transmitter wake up times to
optimize system energy consumption.
The EFR32MG1X232 uses a low-IF receiver architecture, consisting of a Low-Noise Amplifier (LNA) followed by an I/Q down-conver-
sion mixer, emplying a 38.4 MHz crystal reference. The I/Q signals are further filtered and amplified before being sampled by the IF
analog-to-digital converter (IFADC).
The IF frequency is configurable from 150 kHz to 1371 kHz. The IF can further be configured for high-side or low-side injection, provid-
ing flexibility with respect to known interferers at the image frequency.
The Automatic Gain Control (AGC) module adjusts the receiver gain to optimize performance and avoid saturation for excellent selec-
tivity and blocking performance.
Demodulation is performed in the digital domain. The demodulator performs configurable decimation and channel filtering to allow re-
ceive bandwidths ranging from 0.1 to 2530 kHz. High carrier frequency and baud rate offsets are tolerated by active estimation and
compensation. Advanced features supporting high quality communication under adverse conditions include forward error correction by
block and convolutional coding as well as Direct Sequence Spread Spectrum (DSSS).
A Received Signal Strength Indicator (RSSI) is available for signal quality metrics, for level-based proximity detection, and for RF chan-
nel access by Collision Avoidance (CA) or Listen Before Talk (LBT) algorithms. An RSSI capture value with dB resolution is associated
with each received frame and the dynamic RSSI measurement can be monitored throughout reception.
The EFR32MG1X232 features integrated support for antenna diversity to improve link budget, using complementary control outputs to
an external switch. Internal configurable hardware controls automatic switching between antennae during RF receive detection opera-
tions.
In typical applications, the demodulator output is stored in internal buffer memory for access by the MCU. Direct mode supports direct
serial output of demodulated data on configured GPIO pins.
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