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557GI-03LF

Description
TSSOP-16, Tube
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size286KB,12 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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557GI-03LF Overview

TSSOP-16, Tube

557GI-03LF Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP16,.25
Contacts16
Manufacturer packaging codePGG16
Reach Compliance Codecompliant
ECCN codeEAR99
Samacsys DescriptionTSSOP 4.4 MM 0.65MM PITCH
JESD-30 codeR-PDSO-G16
JESD-609 codee3
length5 mm
Humidity sensitivity level1
Number of terminals16
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output clock frequency200 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Master clock/crystal nominal frequency25 MHz
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum slew rate65 mA
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width4.4 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches1
DATASHEET
2 OUTPUT PCI-EXPRESS GEN1 CLOCK SOURCE
Description
The ICS557-03 is a spread spectrum clock generator that
supports PCI-Express Gen 1 and Ethernet requirements.
The device is used for PC or embedded systems to
substantially reduce electromagnetic interference (EMI).
The device provides two differential (HCSL) spread
spectrum outputs. The spread type and amount are
configured via select pin. Using IDT’s patented
Phase-Locked Loop (PLL) techniques, the device takes a
25 MHz crystal input and produces two pairs of differential
outputs at 25 MHz, 100 MHz, 125 MHz or 200 MHz clock
frequencies for HCSL, and 25 MHz or 100 MHz for LVDS.
ICS557-03
Features
Packaged in 16-pin TSSOP
RoHS 5 (green) or RoHS 6 (green and lead free)
compliant packaging
Supports HCSL or LVDS output levels
Operating voltage of 3.3 V
Input frequency of 25 MHz
Jitter 60 ps (cycle-to-cycle)
Spread Spectrum capability
Industrial and commercial temperature ranges
For PCIe Gen2 applications, see the 5V41065
For PCIe Gen3 applications, see the 5V41235
Block Diagram
VDD
2
SS1:SS0
S1:S0
2
CLK0
Control
Logic
Phase Lock Loop
CLK1
CLK1
CLK0
2
X1/ICLK
25 MHz
crystal or clock X2
Optional tuning crystal
capacitors
Clock
Buffer/
Crystal
Oscillator
2
GND
OE
Rr(IREF)
IDT®
2 OUTPUT PCI-EXPRESS GEN1 CLOCK SOURCE
1
ICS557-03
REV U 112111

557GI-03LF Related Products

557GI-03LF 557GI-03LFT 557G-03LFT
Description TSSOP-16, Tube TSSOP-16, Reel TSSOP-16, Reel
Brand Name Integrated Device Technology Integrated Device Technology Integrated Device Technology
Is it lead-free? Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to
Parts packaging code TSSOP TSSOP TSSOP
package instruction TSSOP, TSSOP16,.25 TSSOP, TSSOP16,.25 TSSOP, TSSOP16,.25
Contacts 16 16 16
Manufacturer packaging code PGG16 PGG16 PGG16
Reach Compliance Code compliant compliant compliant
ECCN code EAR99 EAR99 EAR99
JESD-30 code R-PDSO-G16 R-PDSO-G16 R-PDSO-G16
JESD-609 code e3 e3 e3
length 5 mm 5 mm 5 mm
Humidity sensitivity level 1 1 1
Number of terminals 16 16 16
Maximum operating temperature 85 °C 85 °C 70 °C
Minimum operating temperature -40 °C -40 °C -
Maximum output clock frequency 200 MHz 200 MHz 200 MHz
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP TSSOP
Encapsulate equivalent code TSSOP16,.25 TSSOP16,.25 TSSOP16,.25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 260 260 260
power supply 3.3 V 3.3 V 3.3 V
Master clock/crystal nominal frequency 25 MHz 25 MHz 25 MHz
Certification status Not Qualified Not Qualified Not Qualified
Maximum seat height 1.2 mm 1.2 mm 1.2 mm
Maximum slew rate 65 mA 65 mA 65 mA
Maximum supply voltage 3.63 V 3.63 V 3.63 V
Minimum supply voltage 2.97 V 2.97 V 2.97 V
Nominal supply voltage 3.3 V 3.3 V 3.3 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL COMMERCIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form GULL WING GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm 0.65 mm
Terminal location DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 4.4 mm 4.4 mm 4.4 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches 1 1 1
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) -
Samacsys Description TSSOP 4.4 MM 0.65MM PITCH Clock Generators & Support Products PCI-EXPRESS CLOCK SOURCE -
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