NG80960KB datasheet, PDF - EEWORLD Datasheet

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NG80960KB: DescriptionRISC Microprocessor, 32-Bit, 25MHz, CMOS, PQFP132, PLASTIC, QFP-132; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，102 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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NG80960KB Overview

RISC Microprocessor, 32-Bit, 25MHz, CMOS, PQFP132, PLASTIC, QFP-132

NG80960KB Parametric

Parameter Name	Attribute value
Maker	Intel
Parts packaging code	QFP
package instruction	BQFP,
Contacts	132
Reach Compliance Code	unknown
Address bus width	32
bit size	32
boundary scan	NO
maximum clock frequency	25 MHz
External data bus width	32
Format	FLOATING POINT
Integrated cache	NO
JESD-30 code	S-PQFP-G132
length	24.13 mm
low power mode	NO
Number of terminals	132
Maximum operating temperature	85 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	BQFP
Package shape	SQUARE
Package form	FLATPACK, BUMPER
Certification status	Not Qualified
Maximum seat height	4.32 mm
speed	25 MHz
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	QUAD
width	24.13 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC
Base Number Matches	1

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Intel i960 RM/RN I/O Processor

Design Guide

April 2002

Order Number:

273139-004

Intel

i960

RM/RN I/O Processor

Contents

1.0

2.0

3.0

4.0

Introduction ................................................................................................................................... 9

Intel

80960RM/RN Processor Ball Map...................................................................................... 9

2.1

3.1

4.1

4.1.1

4.1.2

4.2

4.2.1

4.2.2

4.2.3

4.2.4

4.2.5

5.0

5.1

5.2

6.0

6.1

6.2

6.3

7.0

8.0

9.0

Intel

80960RM/RN Processor PBGA Signal Ball Map .................................................10

Trace Length Limits .......................................................................................................11

ROM, SRAM, or Flash Guidelines .................................................................................12

Layout Guidelines ..........................................................................................................13

Wait State Profiles .........................................................................................................13

SDRAM Guidelines........................................................................................................14

Layout Guidelines ..........................................................................................................15

SDRAM Clocking and Clock Buffer Specifications ........................................................20

SDRAM Power Failure Guidelines.................................................................................23

System Assumptions .....................................................................................................23

External Logic Required for Power Failure ....................................................................23

Intel

80960RM/RN Processor Implementation on a MotherBoard...............................25

Intel

80960RM/RN Processor Implementation on an Add-in Card ..............................26

Layout Guidelines for Add-in Cards...............................................................................27

Layout Guidelines for Motherboards..............................................................................28

Clock Vendors ...............................................................................................................29

Routing Guidelines .....................................................................................................................11

Intel

80960RM/RN Processor Memory Subsystem ..................................................................12

Interrupt Routing .........................................................................................................................25

Clocking Guidelines ....................................................................................................................27

Intel

80960RM/RN Processor Signals Requiring Pull-Up/Down Resistors...............................30

Intel

80960RM/RN Processor Signals Requiring Pull-Up/Down Resistors...............................32

Intel

80960RM/RN Processor 5 V and 3.3 V Design Considerations .......................................34

9.1

9.2

9.3

9.4

9.5

9.6

9.7

Providing 3.3 V in a 5 V System ....................................................................................34

Choosing a Power Source .............................................................................................36

PCI Adapter Card Power Source...................................................................................37

CC5REF

Pin Requirement (V

DIFF

) .................................................................................37

CCPLL

Pins Requirement..............................................................................................38

Pullups and Pulldown Resistors ....................................................................................38

FAIL# .............................................................................................................................39

High Frequency Decoupling ..........................................................................................40

Bulk Decoupling Capacitance........................................................................................41

10.0

Processor Power Supply Decoupling .........................................................................................40

10.1

10.2

11.0

12.0

Intel

80960RM/RN Processor Based Reference Design ..........................................................42

Debug Connector Recommendations.........................................................................................43

12.1

12.2

PBGA Sockets and Headers .........................................................................................43

Logic Analyzer Connectivity...........................................................................................45

Design Guide

Intel

i960

RM/RN I/O Processor

12.3

12.3.1

12.3.2

12.3.3

12.3.4

13.0

14.0

JTAG Connector and Test Interface .............................................................................. 48

Intel

i960

RM/RN I/O Processor JTAG Emulator ..................................................... 48

Intel

i960

RM/RN I/O Processor Target Debug Interface Connector ....................... 48

Connecting The Emulator To The Target ...................................................................... 50

Other Tools .................................................................................................................... 51

Design for Manufacturability ....................................................................................................... 52

Thermal Solutions....................................................................................................................... 53

14.1

14.2

14.3

14.4

14.5

14.5.1

14.5.2

14.5.3

14.5.4

14.5.5

14.5.6

Thermal Recommendations .......................................................................................... 53

3-Dimensional View: Processor with Heat Sink Attached.............................................. 54

PCB Heatsink Hole Dimensions .................................................................................... 55

Clearances of PCI Board and Components .................................................................. 57

Heat Sink Information .................................................................................................... 58

Socket Information......................................................................................................... 58

Socket-Header Vendor .................................................................................................. 58

Burn-in Socket Vendor .................................................................................................. 58

Shipping Tray Vendor .................................................................................................... 59

Logic Analyzer Interposer Vendor ................................................................................. 59

JTAG Emulator Vendor ................................................................................................. 59

Related Documents ....................................................................................................... 60

Electronic Information .................................................................................................... 60

15.0

References ................................................................................................................................. 60

15.1

15.2

Intel

i960

RM I/O Processor Schematics .............................................................................. 61

Intel

IQ80960RM Board Bill of Material .................................................................................... 72

Intel

i960

RN I/O Processor Schematics .............................................................................. 76

Intel

IQ80960RN Board Bill of Material..................................................................................... 88

Intel

IQ80960RM/RN SDRAM Battery Backup PLD Equations................................................ 92

Intel

80960RM/RN Processor PBGA Signal Ball Map.............................................................. 93

Design Guide

Intel

i960

RM/RN I/O Processor

Figures

2-1

3-2

4-3

4-4

4-5

4-6

4-7

4-8

4-9

4-10

4-11

4-12

4-13

5-14

6-15

6-16

9-17

9-18

9-19

9-20

9-21

9-22

10-23

12-24

12-25

12-26

12-27

12-28

12-29

12-30

12-31

14-32

14-33

14-34

14-35

15-36

15-37

15-38

15-39

15-40

15-41

15-42

15-43

15-44

15-45

15-46

15-47

15-48

15-49

540L H-PBGA Diagram (Bottom View).......................................................................................10

Examples of Stubless and Short Stub Traces ............................................................................11

4 Mbyte Flash Memory System ..................................................................................................13

Dual-Bank SDRAM Memory Subsystem ....................................................................................15

SDRAM DIMM Layout Topology #1............................................................................................17

SDRAM DIMM Layout Topology #2............................................................................................17

Address and Control Topology for Two Discrete SDRAM Devices ............................................18

Address and Control Topology for Four or More Discrete SDRAM Devices ..............................18

Data and DQM Topology for Discrete SDRAM Devices.............................................................19

Clocking for a Dual-Bank SDRAM DIMM ...................................................................................20

Clock Routing for a Two Device SDRAM Subsystem.................................................................22

External Power Failure State Machine .......................................................................................23

External Power Failure Logic in the System ...............................................................................24

Example Secondary PCI Connector Interrupt Routing ...............................................................26

PCI Add-in Card Example Configuration ....................................................................................27

Motherboard Example Configuration .......................................................................................... 28

Creating a Power “Island” ...........................................................................................................35

Power Supply Circuit ..................................................................................................................36

Recommended Power Supply Connection Layout .....................................................................36

CC5REF

Current-Limiting Resistor .............................................................................................37

CCPLL

Low-Pass Filter ..............................................................................................................38

Recommended FAIL# Circuit......................................................................................................39

High-Frequency Capacitor Values and Layout ...........................................................................41

540L PBGA Header ....................................................................................................................43

540L PBGA Socket.....................................................................................................................44

Packard-Hughes Direct Mount (Flex Tape) Interposer - Top View.............................................46

Packard-Hughes Direct Mount (Flex Tape) Interposer - Side View............................................46

Flex Tape Interposer Application (Add-In Card) .........................................................................47

Flex Tape Interposer (Top View) ................................................................................................47

Flex Tape Interposer (Side View) ...............................................................................................47

JTAG Emulator Connector (Top View) .......................................................................................48

Conceptual 3-D View of Processor with a Heat Sink..................................................................54

Hole Dimensions for Passive Heatsink.......................................................................................55

Board Level Keep Out Areas ......................................................................................................56

Clearances of PCI Board and Components................................................................................57

Decoupling and 3.3 V Power Schematic ....................................................................................62

Primary PCI Interface Schematic................................................................................................63

Memory Controller Schematic ....................................................................................................64

Flash ROM, UART and LEDs Schematic ...................................................................................65

Logic Analyzer I/F Schematic .....................................................................................................66

SDRAM 168-Pin DIMM Schematic .............................................................................................67

Secondary PCI/80960 Core Schematic ......................................................................................68

Secondary PCI Bus 1/2 Schematic.............................................................................................69

Secondary PCI Bus 3/4 Schematic.............................................................................................70

Battery Monitor Schematic..........................................................................................................71

Decoupling and 3.3 V Power Schematic ....................................................................................77

Primary PCI Interface Schematic................................................................................................78

Memory Controller Schematic ....................................................................................................79

Flash ROM, UART and LEDs Schematic ...................................................................................80

Design Guide

NG80960KB Related Products

	NG80960KB	A80960KB
Description	RISC Microprocessor, 32-Bit, 25MHz, CMOS, PQFP132, PLASTIC, QFP-132	RISC Microprocessor, 32-Bit, 25MHz, CMOS, CPGA132, 2.54 MM PITCH, CERAMIC, PGA-132
Maker	Intel	Intel
Parts packaging code	QFP	PGA
package instruction	BQFP,	PGA,
Contacts	132	132
Reach Compliance Code	unknown	unknown
Address bus width	32	32
bit size	32	32
boundary scan	NO	NO
maximum clock frequency	25 MHz	25 MHz
External data bus width	32	32
Format	FLOATING POINT	FLOATING POINT
Integrated cache	NO	NO
JESD-30 code	S-PQFP-G132	S-CPGA-P132
length	24.13 mm	36.802 mm
low power mode	NO	NO
Number of terminals	132	132
Maximum operating temperature	85 °C	85 °C
Package body material	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED
encapsulated code	BQFP	PGA
Package shape	SQUARE	SQUARE
Package form	FLATPACK, BUMPER	GRID ARRAY
Certification status	Not Qualified	Not Qualified
Maximum seat height	4.32 mm	4.061 mm
speed	25 MHz	25 MHz
Maximum supply voltage	5.25 V	5.25 V
Minimum supply voltage	4.75 V	4.75 V
Nominal supply voltage	5 V	5 V
surface mount	YES	NO
technology	CMOS	CMOS
Temperature level	OTHER	OTHER
Terminal form	GULL WING	PIN/PEG
Terminal pitch	0.635 mm	2.54 mm
Terminal location	QUAD	PERPENDICULAR
width	24.13 mm	36.802 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC
Base Number Matches	1	1

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