Philips Semiconductors
Preliminary specification
Octal buffer/line driver; 3-state
FEATURES
•
Wide supply voltage range of 1.65 to 3.6 V
•
Complies with JEDEC standard:
– JESD8-7 (1.65 to 1.95 V)
– JESD8-5 (2.3 to 2.7 V)
– JESD8B/JESD36 (2.7 to 3.6 V).
•
3.6 V tolerant inputs/outputs
•
CMOS LOW power consumption
•
Direct interface with TTL levels (2.7 to 3.6 V)
•
Power-down mode
•
Latch-up performance exceeds
≤
250 mA
•
ESD protection:
– Human Body Model (HBM) (A 114-A) exceeds
2000 V
– Machine Model (MM) (A 115-A) exceeds 200 V.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C.
SYMBOL
t
PHL
/t
PLH
PARAMETER
propagation delay inputs
nA
n
to output nY
n
CONDITIONS
V
CC
= 1.8 V; C
L
= 30 pF; R
L
= 1 kΩ
V
CC
= 2.5 V; C
L
= 30 pF; R
L
= 500
Ω
V
CC
= 2.7 V; C
L
= 50 pF; R
L
= 500
Ω
V
CC
= 3.3 V; C
L
= 50 pF; R
L
= 500
Ω
C
I
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
+ (C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts.
2. The condition is V
I
= GND to V
CC
.
input capacitance
power dissipation capacitance per buffer
V
CC
= 3.3 V; notes 1 and 2
DESCRIPTION
74ALVC244
The 74ALVC244 is a high-performance, low-power,
low-voltage, Si-gate CMOS device and superior to most
advanced CMOS compatible TTL families.
The 74ALVC244 is an octal non-inverting buffer/line driver
with 3-state outputs. The 3-state outputs are controlled by
the output enable inputs 1OE and 2OE. A HIGH on nOE
causes the outputs to assume a HIGH impedance
OFF-state. Schmitt-trigger action at all inputs makes the
circuit highly tolerant for slower input rise and fall times.
TYPICAL
−
−
−
−
3.5
20
UNIT
ns
ns
ns
ns
pF
pF
2001 Oct 30
2
Philips Semiconductors
Preliminary specification
Octal buffer/line driver; 3-state
FUNCTION TABLE
See note 1.
INPUT
nOE
L
L
H
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = HIGH-impedance OFF-state.
ORDERING INFORMATION
PACKAGES
TYPE NUMBER
PINS
74ALVC244D
74ALVC244PW
PINNING
PIN
1
2, 4, 6 and 8
3, 5, 7 and 9
10
11, 13, 15 and 17
12, 14, 16 and 18
19
20
1OE
1A
0
to 1A
3
2Y
0
to 2Y
3
GND
2A
3
to 2A
0
1Y
3
to 1Y
0
2OE
V
CC
SYMBOL
data inputs
bus outputs
ground (0 V)
data inputs
bus outputs
output enable input (active LOW)
supply voltage
DESCRIPTION
output enable input (active LOW)
20
20
PACKAGE
SO
TSSOP
MATERIAL
plastic
plastic
nA
n
L
H
X
74ALVC244
OUTPUT
nY
n
L
H
Z
CODE
SOT163-1
SOT360-1
2001 Oct 30
3
Philips Semiconductors
Preliminary specification
Octal buffer/line driver; 3-state
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
I
V
O
PARAMETER
supply voltage
input voltage
output voltage
CONDITIONS
0
V
CC
= 1.65 to 3.6 V; enable mode 0
V
CC
= 1.65 to 3.6 V; disable mode 0
V
CC
= 0 V; Power-down mode
T
amb
t
r
, t
f
operating ambient temperature
input rise and fall times
V
CC
= 1.65 to 2.7 V
V
CC
= 2.7 to 3.6 V
0
−40
0
0
MIN.
1.65
3.6
3.6
V
CC
3.6
3.6
+85
20
10
74ALVC244
MAX.
V
V
V
V
V
UNIT
°C
ns/V
ns/V
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
V
CC
I
IK
V
I
I
OK
V
O
PARAMETER
supply voltage
input diode current
input voltage
output diode current
output voltage
V
O
> V
CC
or V
O
< 0
enable mode; notes 1 and 2
disable mode
Power-down mode; note 2
I
O
I
GND
, I
CC
T
stg
P
tot
output diode current
V
CC
or GND current
storage temperature
power dissipation per package
SO package
TSSOP package
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When V
CC
= 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation.
above 70
°C
derate linearly with
8 mW/K
above 60
°C
derate linearly with
5.5 mW/K
−
−
500
500
mW
mW
V
O
= 0 to V
CC
V
I
< 0
CONDITIONS
−
−0.5
−
−0.5
−0.5
−0.5
−
−
−65
MIN.
−0.5
MAX.
+4.6
−50
+4.6
±50
V
CC
+ 0.5
+4.6
+4.6
±50
±100
+150
V
mA
V
mA
V
V
V
mA
mA
°C
UNIT
2001 Oct 30
5
stm32/stm8
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